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公开(公告)号:US09048210B2
公开(公告)日:2015-06-02
申请号:US13550032
申请日:2012-07-16
Applicant: Hyung-su Jeong , Jai-kwang Shin , Nam-young Lee , Ji-hoon Lee , Min-kwon Cho , Yong-cheol Choi , Hyuk-soon Choi
Inventor: Hyung-su Jeong , Jai-kwang Shin , Nam-young Lee , Ji-hoon Lee , Min-kwon Cho , Yong-cheol Choi , Hyuk-soon Choi
IPC: H01L29/36 , H01L29/66 , H01L29/739
CPC classification number: H01L29/36 , H01L29/6634 , H01L29/7397
Abstract: A transistor includes a device portion and a collector layer. The device portion is in a first side of a semiconductor substrate, and includes a gate and an emitter. The collector layer is on a second side of the semiconductor substrate, which is opposite to the first side. The collector layer is an impurity-doped epitaxial layer and has a doping profile with a non-normal distribution.
Abstract translation: 晶体管包括器件部分和集电极层。 器件部分位于半导体衬底的第一侧,并且包括栅极和发射极。 集电极层位于半导体衬底的与第一侧相对的第二侧上。 集电极层是杂质掺杂的外延层,并具有非正态分布的掺杂分布。
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公开(公告)号:US20140042530A1
公开(公告)日:2014-02-13
申请号:US13963161
申请日:2013-08-09
Applicant: Min-Kwon CHO , Takayuki GOMI , Chan-Ho PARK , Nam-Ki CHO , Won-Sang CHOI
Inventor: Min-Kwon CHO , Takayuki GOMI , Chan-Ho PARK , Nam-Ki CHO , Won-Sang CHOI
CPC classification number: H01L29/0619 , H01L29/0634 , H01L29/0696 , H01L29/1095 , H01L29/402 , H01L29/404 , H01L29/41766 , H01L29/456 , H01L29/66666 , H01L29/66727 , H01L29/66734 , H01L29/78 , H01L29/7811 , H01L29/7813 , H01L29/7827
Abstract: A semiconductor device includes a substrate including a first region and a second region, a trench-gate transistor in the first region, the trench-gate transistor including a first trench in the substrate, a gate filling at least part of the first trench, and a source in the substrate and on each sidewall of the first trench, a first field diffusion junction in the second region, an interlayer insulating film on the substrate, the interlayer insulating film covering the trench-gate transistor and the first field diffusion junction, a first contact in the first region, the first contact passing through the interlayer insulating film and contacting the source, and a second contact in the second region, the second contact passing through the interlayer insulating film and contacting the first field diffusion junction, the first contact and the second contact having an equal height and including a same material.
Abstract translation: 一种半导体器件包括:包括第一区域和第二区域的衬底;第一区域中的沟槽栅极晶体管,沟槽栅极晶体管包括衬底中的第一沟槽,填充至少部分第一沟槽的栅极,以及 在第一沟槽的衬底和每个侧壁上的源极,第二区域中的第一场扩散结,衬底上的层间绝缘膜,覆盖沟槽栅晶体管的层间绝缘膜和第一场扩散结, 所述第一接触通过所述层间绝缘膜并接触所述源,所述第二接触在所述第二区域中,所述第二接触通过所述层间绝缘膜并接触所述第一场扩散结,所述第一接触 并且第二触点具有相同的高度并且包括相同的材料。
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公开(公告)号:US20130200427A1
公开(公告)日:2013-08-08
申请号:US13550032
申请日:2012-07-16
Applicant: Hyung-su Jeong , Jai-kwang Shin , Nam-young Lee , Ji-hoon Lee , Min-kwon Cho , Yong-cheol Choi , Hyuk-soon Choi
Inventor: Hyung-su Jeong , Jai-kwang Shin , Nam-young Lee , Ji-hoon Lee , Min-kwon Cho , Yong-cheol Choi , Hyuk-soon Choi
IPC: H01L29/739 , H01L21/331
CPC classification number: H01L29/36 , H01L29/6634 , H01L29/7397
Abstract: A transistor includes a device portion and a collector layer. The device portion is in a first side of a semiconductor substrate, and includes a gate and an emitter. The collector layer is on a second side of the semiconductor substrate, which is opposite to the first side. The collector layer is an impurity-doped epitaxial layer and has a doping profile with a non-normal distribution.
Abstract translation: 晶体管包括器件部分和集电极层。 器件部分位于半导体衬底的第一侧,并且包括栅极和发射极。 集电极层位于半导体衬底的与第一侧相对的第二侧上。 集电极层是杂质掺杂的外延层,并具有非正态分布的掺杂分布。
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