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    APPARATUS FOR SPINNING TEST TRAY OF IN-LINE TEST HANDLER AND IN-LINE TEST HANDLER
    3.
    发明申请
    APPARATUS FOR SPINNING TEST TRAY OF IN-LINE TEST HANDLER AND IN-LINE TEST HANDLER 有权
    用于旋转测试操作器和在线测试操作器的测试盘的设备

    公开(公告)号：US20140203832A1

    公开(公告)日：2014-07-24

    申请号：US14161494

    申请日：2014-01-22

    申请人： Kyung Tae KIM ,  Chan Ho PARK ,  Jae Gue LEE ,  Ung Hyun YOO ,  Hae Jun PARK ,  Kook Hyung LEE ,  Hyun Chae CHUNG ,  Jang Yong PARK

    发明人： Kyung Tae KIM ,  Chan Ho PARK ,  Jae Gue LEE ,  Ung Hyun YOO ,  Hae Jun PARK ,  Kook Hyung LEE ,  Hyun Chae CHUNG ,  Jang Yong PARK

    IPC分类号： G01R1/04

    CPC分类号： G01R31/2893

    摘要： Disclosed is an apparatus for spinning a test tray and an in-line test handler including the above apparatus, wherein the apparatus may include a supporting unit for supporting a test tray transported between first and second chamber units facing in the different directions, wherein the first chamber unit is provided at a predetermined interval from the second chamber unit; a base unit to which the supporting unit is spinnably connected; and a spinning unit which spins the test tray so that semiconductor devices received in the test tray are tested at the same arrangement in each of the first chamber unit and the second chamber unit.

    摘要翻译： 公开了一种用于纺制试验托盘的设备和包括上述设备的在线测试处理器，其中该设备可以包括支撑单元，用于支撑在面向不同方向的第一和第二室单元之间运送的测试托盘，其中第一 从第二室单元以预定的间隔设置室单元; 支撑单元可旋转地连接到其上的基座单元; 以及旋转单元，其旋转测试托盘，使得接收在测试托盘中的半导体器件以与第一室单元和第二室单元中的每一个相同的布置被测试。

    METHOD FOR GUIDING LOCATION, MACHINE-READABLE SAVING MEDIUM, AND MOBILE COMMUNICATION TERMINAL
    4.
    发明申请
    METHOD FOR GUIDING LOCATION, MACHINE-READABLE SAVING MEDIUM, AND MOBILE COMMUNICATION TERMINAL 有权
    引导位置，机器可读节省媒体和移动通信终端的方法

    公开(公告)号：US20130273940A1

    公开(公告)日：2013-10-17

    申请号：US13995057

    申请日：2011-12-15

    申请人： Chan-Ho Park

    发明人： Chan-Ho Park

    IPC分类号： H04W4/02

    CPC分类号： H04W4/02 ,  G01C21/20 ,  G01C21/3438 ,  G01C21/362 ,  H04L67/18 ,  H04W4/026 ,  H04W4/027 ,  H04W4/043 ,  H04W4/16 ,  H04W4/20

    摘要： A method for guiding location includes commencing a call between a first terminal and a second terminal, the first terminal requesting the collection of location information from the second terminal, receiving the location information of the second terminal and displaying on the first terminal a geographic information map displaying the location information, and the user of the first terminal transmitting to the second terminal direction information that is displayed on the geographic information map. As a result, more intuitive and convenient location guidance is provided.

    摘要翻译： 一种用于引导位置的方法包括开始第一终端和第二终端之间的呼叫，第一终端请求从第二终端收集位置信息，接收第二终端的位置信息，并在第一终端上显示地理信息图 显示位置信息，以及第一终端的用户发送到在地理信息图上显示的第二终端方向信息。 因此，提供了更直观和方便的位置指导。

    Recording medium, apparatus for recording/reproducing data on/from the same and method thereof
    6.
    发明授权
    Recording medium, apparatus for recording/reproducing data on/from the same and method thereof 有权
    记录介质，用于记录/再现数据的装置及其方法

    公开(公告)号：US08077561B2

    公开(公告)日：2011-12-13

    申请号：US11776410

    申请日：2007-07-11

    申请人： Chan Ho Park ,  Hyug Jin Kwon ,  Sung Hoon Kim

    发明人： Chan Ho Park ,  Hyug Jin Kwon ,  Sung Hoon Kim

    IPC分类号： G11B7/00

    CPC分类号： G11B20/1217 ,  G11B7/00736 ,  G11B7/0079 ,  G11B7/1267 ,  G11B7/24038 ,  G11B27/329 ,  G11B2020/1275 ,  G11B2020/1277 ,  G11B2220/237 ,  G11B2220/2541

    摘要： A physical structure, apparatus for recording/reproducing on/from a recording medium using the same and method thereof are disclosed, by which the physical structure suitable for such a recording medium as BD and the like may be provided. The present invention includes a plurality of recording layers. Each of the recording layers includes a power test area not provided to a physically same position and a management area not provided to a physically same position, wherein a layer having the power test zone and the management area allocated consecutively includes a test area buffer allocated to the power test zone.

    摘要翻译： 公开了一种物理结构，用于使用该记录介质记录/再现记录介质的装置及其方法，通过该物理结构可以提供适合于BD等记录介质的物理结构。 本发明包括多个记录层。 每个记录层包括未提供给物理相同位置的功率测试区域和未提供给物理相同位置的管理区域，其中具有功率测试区域和管理区域连续分配的层包括分配给 电源测试区。

    APPARATUS AND METHOD FOR MEASURING CHARACTERISTICS OF SEMICONDUCTOR DEVICE
    7.
    发明申请
    APPARATUS AND METHOD FOR MEASURING CHARACTERISTICS OF SEMICONDUCTOR DEVICE 有权
    测量半导体器件特性的装置和方法

    公开(公告)号：US20100164532A1

    公开(公告)日：2010-07-01

    申请号：US12647499

    申请日：2009-12-27

    申请人： Chan-Ho Park ,  Won-Young Jung

    发明人： Chan-Ho Park ,  Won-Young Jung

    IPC分类号： G01R31/26

    CPC分类号： G01R31/31725

    摘要： An apparatus and method for measuring the characteristics of a semiconductor device is disclosed. The measuring apparatus may include first to M-th (wherein M is a positive integer not less than 1) starved devices each being biased in response to a bias voltage varying in accordance with a variable first supply voltage, thereby varying an amount of current flowing through a semiconductor device included in the starved device. Interconnect lines may interconnect the first to M-th starved devices. A measuring unit measures at least one of a delay time caused by the semiconductor devices of the starved devices themselves, and a compound delay time caused by the semiconductor devices of the starved devices themselves plus a delay time caused by the interconnect lines. The measured results can be analyzed under conditions more approximate to diverse situations exhibited in practical chips in accordance with development of manufacturing processes and techniques. It is also possible to provide the basis of a model which more effectively represents coupling geometry of more complex semiconductor devices and interconnect lines. The basis of the model may be applied to development of various tools, etc.

    摘要翻译： 公开了一种用于测量半导体器件的特性的装置和方法。 测量装置可以包括第一至第M（其中M是不小于1的正整数），每个被调节的器件响应于根据可变的第一电源电压而变化的偏置电压被偏置，从而改变流动的电流量 通过包括在饥饿设备中的半导体器件。 互连线路可以将第一个到第五个饥饿设备互连。 测量单元测量由受饥饿器件本身的半导体器件引起的延迟时间和由缺陷器件本身的半导体器件引起的复合延迟时间中的至少一个加上由互连线引起的延迟时间。 根据制造工艺和技术的发展，可以在更接近于实际芯片中显示的多种情况的条件下分析测量结果。 还可以提供更有效地代表更复杂的半导体器件和互连线的耦合几何的模型的基础。 该模型的基础可以应用于各种工具的开发等。

    Capacitor structure of semiconductor device
    8.
    发明申请
    Capacitor structure of semiconductor device 审中-公开
    半导体器件的电容结构

    公开(公告)号：US20080054401A1

    公开(公告)日：2008-03-06

    申请号：US11892752

    申请日：2007-08-27

    申请人： Chan Ho Park

    发明人： Chan Ho Park

    IPC分类号： H01L29/00

    CPC分类号： H01L28/87 ,  H01L23/5223 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A capacitor structure of a semiconductor device includes: a plurality of first metal elements connected in a vertical direction by first vias; a plurality of second metal elements connected in the vertical direction by second vias and arranged alternately with the first metal elements in a horizontal direction; dielectric materials formed between the first and the second metal elements; and a branch unit for supplying current to each layer of the capacitor structure and grounding each layer of the capacitor structure, each layer having the first and the second metal elements disposed in an identical horizontal plane, wherein one ends of the first metal elements and one ends of the second metal elements are extended in opposite horizontal directions to form a first and a second extension unit, respectively; and the first and the second extension units are connected to the branch unit.

    摘要翻译： 半导体器件的电容器结构包括：通过第一通孔在垂直方向上连接的多个第一金属元件; 多个第二金属元件，其通过第二通孔在垂直方向上连接并与第一金属元件沿水平方向交替布置; 在第一和第二金属元件之间形成介电材料; 以及分支单元，用于向电容器结构的每个层提供电流并使电容器结构的每个层接地，每个层具有设置在相同水平面中的第一和第二金属元件，其中第一金属元件的一端和一个 第二金属元件的端部在相反的水平方向上延伸以分别形成第一和第二延伸单元; 并且第一和第二扩展单元连接到分支单元。

    Bipolar transistors and methods of manufacturing the same
    9.
    发明授权
    Bipolar transistors and methods of manufacturing the same 有权
    双极晶体管及其制造方法相同

    公开(公告)号：US06911715B2

    公开(公告)日：2005-06-28

    申请号：US10655820

    申请日：2003-09-05

    申请人： Chan-ho Park ,  Jin-myung Kim ,  Kyeong-seok Park ,  Dong-ho Hyun

    发明人： Chan-ho Park ,  Jin-myung Kim ,  Kyeong-seok Park ,  Dong-ho Hyun

    IPC分类号： H01L21/331 ,  H01L27/082 ,  H01L29/08 ,  H01L29/73 ,  H01L29/732 ,  H01L31/0336

    CPC分类号： H01L29/0821 ,  H01L29/73 ,  H01L29/732

    摘要： A bipolar transistor in which the occurrence of Kirk effect is suppressed when a high current is injected into the bipolar transistor and a method of fabricating the bipolar transistor are described. The bipolar transistor includes a first collector region of a first conductive type having high impurity concentration, a second collector region of a first conductive type which has high impurity concentration and is formed on the first collector region, a base region of a second conductive type being formed a predetermined portion of the second collector region, and an emitter region of a first conductive type being formed in the base region. The bipolar transistor further includes the third collector region, which has higher impurity concentration than the second collector region, at the bottom of the base region. Therefore, it is possible to prevent the base region from extending toward the second collector region due to the third collector region when a high current is injected into the bipolar transistor, thereby improving the capability of driving a current of the bipolar transistor and preventing the occurrence of Kirk effect even during the injection of a high current.

    摘要翻译： 描述了当高电流注入双极晶体管时抑制Kirk效应的发生的双极晶体管和制造双极晶体管的方法。 双极晶体管包括具有高杂质浓度的第一导电类型的第一集电极区域，具有高杂质浓度并形成在第一集电极区域上的第一导电类型的第二集电极区域，第二导电类型的基极区域是 形成第二集电极区域的预定部分，并且在基极区域中形成第一导电类型的发射极区域。 双极晶体管还包括在基极区底部具有比第二集电极区域更高的杂质浓度的第三集电极区域。 因此，当高电流注入双极晶体管时，可以防止基极区域由于第三集电极区域而朝向第二集电极区域延伸，从而提高驱动双极晶体管的电流并防止发生的能力 柯克效应甚至在注入高电流时。

    Sealed test chamber for module IC handler
    10.
    发明授权
    Sealed test chamber for module IC handler 失效
    模块IC处理器的密封测试室

    公开(公告)号：US06607071B1

    公开(公告)日：2003-08-19

    申请号：US09417841

    申请日：1999-10-14

    申请人： Tae Sung An ,  Chan Ho Park ,  Yong Soo Moon ,  Eun Hyoung Seong ,  Ku Kyong Kim

    发明人： Tae Sung An ,  Chan Ho Park ,  Yong Soo Moon ,  Eun Hyoung Seong ,  Ku Kyong Kim

    IPC分类号： B65G2500

    CPC分类号： G01R31/2862

    摘要： The present invention relates to an improved chamber for a module IC handler including a pre-heater for heating module ICs to a set temperature. A receiving piece is installed in a heating chamber and is formed with a plurality of receiving grooves for receiving a carrier holding module ICs. An operating piece is disposed the chamber adjacent the receiving piece. An upper surface the operating piece includes a plurality of receiving grooves of the same interval as the receiving grooves of the receiving piece. In operation, the operating piece raises a module IC carrier from a first groove on the receiving piece and translates the module IC carrier by a distance roughly equivalent to the thickness of the module IC carrier. After translating the module IC carrier, the operating piece lowers the module IC carrier into an adjacent second groove on the receiving piece. By repeating this cycle, the operating piece moves a module IC carrier down the receiving piece, a groove at a time, while the module ICs are being heated, to a feeding means. The feeding means moves the module IC carrier to a test site. Shutters prevent heat from escaping the chamber while the module IC carriers move through the chamber.

    摘要翻译： 本发明涉及用于模块IC处理器的改进室，其包括用于将模块IC加热到设定温度的预热器。 接收片安装在加热室中，并且形成有用于接收载体保持模块IC的多个接收槽。 操作件将腔室设置在接收件附近。 操作件的上表面包括与接收片的接收槽相同间隔的多个接收槽。 在操作中，操作件从接收片上的第一凹槽升起模块IC载体，并将模块IC载体翻转大致等于模块IC载体的厚度。 在模块IC载体翻译之后，操作件将模块IC载体降低到接收件上相邻的第二凹槽中。 通过重复该循环，操作件在模块IC被加热的同时将模块IC载体沿着接收件移动，同时将凹槽移动到馈送装置。 进给装置将模块IC载体移动到测试位置。 当模块IC载体移动通过室时，百叶窗防止热量逸出室。