公开(公告)号：US09214644B2

公开(公告)日：2015-12-15

申请号：US13519176

申请日：2011-12-07

Applicant: Andrew Gabriel Rinzler ,  Mitchell Austin McCarthy ,  Bo Liu

Inventor： Andrew Gabriel Rinzler ,  Mitchell Austin McCarthy ,  Bo Liu

IPC: H01L51/52 ,  H01L29/16 ,  H01L29/78 ,  H01L51/05 ,  H01L51/10 ,  H01L27/32 ,  B82Y99/00 ,  H01L51/00

CPC classification number: H01L51/5203 ,  B82Y99/00 ,  H01L27/3262 ,  H01L27/3274 ,  H01L29/1606 ,  H01L29/7827 ,  H01L51/0045 ,  H01L51/0048 ,  H01L51/057 ,  H01L51/102 ,  H01L51/5296

Abstract: Various embodiments are provided for dilute source enabled vertical organic light emitting transistors. In various embodiments, a display panel includes an array of pixels. In one embodiment, among others, at least one pixel includes a switching transistor and a driving transistor coupled to the switching transistor, where the driving transistor is configured to emit light responsive to activation by the switching transistor. The driving transistor may be a dilute source enabled vertical organic light emitting transistor (DS-VOLET). The switching transistor may include a dilute source enabled vertical-field effect transistor (DS-VFET). In another embodiment, a double dilute source enabled vertical-field effect transistor (DS-VFET) includes a first DS-VFET coupled to a second DS-VFET.

Abstract translation: 提供了用于稀释源的垂直有机发光晶体管的各种实施例。 在各种实施例中，显示面板包括像素阵列。 在一个实施例中，至少一个像素包括开关晶体管和耦合到开关晶体管的驱动晶体管，其中驱动晶体管被配置为响应于开关晶体管的激活而发光。 驱动晶体管可以是具有稀释源的垂直有机发光晶体管（DS-VOLET）。 开关晶体管可以包括具有稀释源的垂直场效应晶体管（DS-VFET）。 在另一个实施例中，双稀释源使能的垂直场效应晶体管（DS-VFET）包括耦合到第二DS-VFET的第一DS-VFET。

公开(公告)号：US20120319096A1

公开(公告)日：2012-12-20

申请号：US13580199

申请日：2011-03-04

Applicant: Andrew Gabriel Rinzler ,  Bo Liu ,  Mitchell Austin McCarthy

Inventor： Andrew Gabriel Rinzler ,  Bo Liu ,  Mitchell Austin McCarthy

IPC: H01L29/78 ,  H01L21/336 ,  H01L51/30 ,  H01L29/792 ,  H01L29/788

CPC classification number: H01L51/0545 ,  B82Y10/00 ,  H01L51/0048 ,  H01L51/0541 ,  H01L51/0566 ,  H01L51/057 ,  H01L51/0591

Abstract: Various embodiments are provided for semiconductor devices including an electrically percolating source layer and methods of fabricating the same. In one embodiment, a semiconductor device includes a gate layer, a dielectric layer, a memory layer, a source layer, a semiconducting channel layer, and a drain layer. The source layer is electrically percolating and perforated. The semiconducting channel layer is in contact with the source layer and the memory layer. The source layer and the semiconducting channel layer form a gate voltage tunable charge injection barrier.

Abstract translation: 提供了包括电渗透源层的半导体器件的各种实施例及其制造方法。 在一个实施例中，半导体器件包括栅极层，电介质层，存储层，源极层，半导体沟道层和漏极层。 源层是电渗透和穿孔的。 半导体沟道层与源层和存储层接触。 源极层和半导体沟道层形成栅极电压可调电荷注入势垒。

公开(公告)号：US20130240842A1

公开(公告)日：2013-09-19

申请号：US13519176

申请日：2011-12-07

Applicant: Andrew Gabriel Rinzler ,  Mitchell Austin McCarthy ,  Bo Liu

Inventor： Andrew Gabriel Rinzler ,  Mitchell Austin McCarthy ,  Bo Liu

IPC: H01L51/52 ,  H01L29/78

CPC classification number: H01L51/5203 ,  B82Y99/00 ,  H01L27/3262 ,  H01L27/3274 ,  H01L29/1606 ,  H01L29/7827 ,  H01L51/0045 ,  H01L51/0048 ,  H01L51/057 ,  H01L51/102 ,  H01L51/5296

Abstract: Various embodiments are provided for dilute source enabled vertical organic light emitting transistors. In various embodiments, a display panel includes an array of pixels. In one embodiment, among others, at least one pixel includes a switching transistor and a driving transistor coupled to the switching transistor, where the driving transistor is configured to emit light responsive to activation by the switching transistor. The driving transistor may be a dilute source enabled vertical organic light emitting transistor (DS-VOLET). The switching transistor may include a dilute source enabled vertical-field effect transistor (DS-VFET). In another embodiment, a double dilute source enabled vertical-field effect transistor (DS-VFET) includes a first DS-VFET coupled to a second DS-VFET.

Abstract translation: 提供了用于稀释源的垂直有机发光晶体管的各种实施例。 在各种实施例中，显示面板包括像素阵列。 在一个实施例中，至少一个像素包括开关晶体管和耦合到开关晶体管的驱动晶体管，其中驱动晶体管被配置为响应于开关晶体管的激活而发光。 驱动晶体管可以是具有稀释源的垂直有机发光晶体管（DS-VOLET）。 开关晶体管可以包括具有稀释源的垂直场效应晶体管（DS-VFET）。 在另一个实施例中，双稀释源使能的垂直场效应晶体管（DS-VFET）包括耦合到第二DS-VFET的第一DS-VFET。

公开(公告)号：US20120256175A1

公开(公告)日：2012-10-11

申请号：US13528953

申请日：2012-06-21

Applicant: Andrew Gabriel Rinzler ,  Bo Liu ,  Mitchell Austin McCarthy ,  John Robert Reynolds ,  Franky So

Inventor： Andrew Gabriel Rinzler ,  Bo Liu ,  Mitchell Austin McCarthy ,  John Robert Reynolds ,  Franky So

IPC: H01L51/30 ,  H01L51/54

CPC classification number: H01L51/5296 ,  B82Y10/00 ,  B82Y20/00 ,  B82Y30/00 ,  H01L51/0039 ,  H01L51/0043 ,  H01L51/0048 ,  H01L51/0558 ,  H01L51/057 ,  H01L51/102 ,  H01L51/5203 ,  Y10S977/701 ,  Y10S977/742 ,  Y10S977/762 ,  Y10S977/767 ,  Y10S977/932 ,  Y10S977/936 ,  Y10S977/937 ,  Y10S977/938

Abstract: Embodiments of the invention relate to vertical field effect transistor that is a light emitting transistor. The light emitting transistor incorporates a gate electrode for providing a gate field, a first electrode comprising a dilute nanotube network for injecting a charge, a second electrode for injecting a complementary charge, and an electroluminescent semiconductor layer disposed intermediate the nanotube network and the electron injecting layer. The charge injection is modulated by the gate field. The holes and electrons, combine to form photons, thereby causing the electroluminescent semiconductor layer to emit visible light. In other embodiments of the invention a vertical field effect transistor that employs an electrode comprising a conductive material with a low density of states such that the transistors contact barrier modulation comprises barrier height lowering of the Schottky contact between the electrode with a low density of states and the adjacent semiconductor by a Fermi level shift.

Abstract translation: 本发明的实施例涉及作为发光晶体管的垂直场效应晶体管。 发光晶体管包括用于提供栅极场的栅电极，包括用于注入电荷的稀释纳米管网络的第一电极，用于注入互补电荷的第二电极和设置在纳米管网络之间的电致发光半导体层和电子注入 层。 电荷注入由栅极场调制。 空穴和电子结合形成光子，从而使电致发光半导体层发射可见光。 在本发明的其它实施例中，采用包括具有低密度状态的导电材料的电极的垂直场效应晶体管，使得晶体管接触势垒调制包括具有低密度状态的电极之间的肖特基接触的势垒高度降低，以及 相邻的半导体通过费米能级移位。

公开(公告)号：US20100237336A1

公开(公告)日：2010-09-23

申请号：US12677457

申请日：2008-09-10

Applicant: Andrew Gabriel Rinzler ,  Bo Liu ,  Mitchell Austin McCarthy ,  John Robert Reynolds ,  Franky So

Inventor： Andrew Gabriel Rinzler ,  Bo Liu ,  Mitchell Austin McCarthy ,  John Robert Reynolds ,  Franky So

IPC: H01L51/30 ,  H01L51/54

CPC classification number: H01L51/5296 ,  B82Y10/00 ,  B82Y20/00 ,  B82Y30/00 ,  H01L51/0039 ,  H01L51/0043 ,  H01L51/0048 ,  H01L51/0558 ,  H01L51/057 ,  H01L51/102 ,  H01L51/5203 ,  Y10S977/701 ,  Y10S977/742 ,  Y10S977/762 ,  Y10S977/767 ,  Y10S977/932 ,  Y10S977/936 ,  Y10S977/937 ,  Y10S977/938

Abstract: Embodiments of the invention relate to vertical field effect transistor that is a light emitting transistor. The light emitting transistor incorporates a gate electrode for providing a gate field, a first electrode comprising a dilute nanotube network for injecting a charge, a second electrode for injecting a complementary charge, and an electroluminescent semiconductor layer disposed intermediate the nanotube network and the electron injecting layer. The charge injection is modulated by the gate field. The holes and electrons, combine to form photons, thereby causing the electroluminescent semiconductor layer to emit visible light. In other embodiments of the invention a vertical field effect transistor that employs an electrode comprising a conductive material with a low density of states such that the transistors contact barrier modulation comprises barrier height lowering of the Schottky contact between the electrode with a low density of states and the adjacent semiconductor by a Fermi level shift.

Abstract translation: 本发明的实施例涉及作为发光晶体管的垂直场效应晶体管。 发光晶体管包括用于提供栅极场的栅电极，包括用于注入电荷的稀释纳米管网络的第一电极，用于注入互补电荷的第二电极和设置在纳米管网络之间的电致发光半导体层和电子注入 层。 电荷注入由栅极场调制。 空穴和电子结合形成光子，从而使电致发光半导体层发射可见光。 在本发明的其它实施例中，采用包括具有低密度状态的导电材料的电极的垂直场效应晶体管，使得晶体管接触势垒调制包括具有低密度状态的电极之间的肖特基接触的势垒高度降低;以及 相邻的半导体通过费米能级移位。

公开(公告)号：US08952361B2

公开(公告)日：2015-02-10

申请号：US13580199

申请日：2011-03-04

Applicant: Andrew Gabriel Rinzler ,  Bo Liu ,  Mitchell Austin McCarthy

Inventor： Andrew Gabriel Rinzler ,  Bo Liu ,  Mitchell Austin McCarthy

IPC: H01L35/24 ,  H01L51/05 ,  B82Y10/00 ,  H01L51/00

CPC classification number: H01L51/0545 ,  B82Y10/00 ,  H01L51/0048 ,  H01L51/0541 ,  H01L51/0566 ,  H01L51/057 ,  H01L51/0591

Abstract: Various embodiments are provided for semiconductor devices including an electrically percolating source layer and methods of fabricating the same. In one embodiment, a semiconductor device includes a gate layer, a dielectric layer, a memory layer, a source layer, a semiconducting channel layer, and a drain layer. The source layer is electrically percolating and perforated. The semiconducting channel layer is in contact with the source layer and the memory layer. The source layer and the semiconducting channel layer form a gate voltage tunable charge injection barrier.

Abstract translation: 提供了包括电渗透源层的半导体器件的各种实施例及其制造方法。 在一个实施例中，半导体器件包括栅极层，电介质层，存储层，源极层，半导体沟道层和漏极层。 源层是电渗透和穿孔的。 半导体沟道层与源层和存储层接触。 源极层和半导体沟道层形成栅极电压可调电荷注入势垒。

公开(公告)号：US08232561B2

公开(公告)日：2012-07-31

申请号：US12677457

申请日：2008-09-10

Applicant: Andrew Gabriel Rinzler ,  Bo Liu ,  Mitchell Austin McCarthy ,  John Robert Reynolds ,  Franky So

Inventor： Andrew Gabriel Rinzler ,  Bo Liu ,  Mitchell Austin McCarthy ,  John Robert Reynolds ,  Franky So

IPC: H01L29/06 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109 ,  H01L27/15 ,  H01L29/18 ,  H01L31/12 ,  H01L33/00 ,  H01L29/26

CPC classification number: H01L51/5296 ,  B82Y10/00 ,  B82Y20/00 ,  B82Y30/00 ,  H01L51/0039 ,  H01L51/0043 ,  H01L51/0048 ,  H01L51/0558 ,  H01L51/057 ,  H01L51/102 ,  H01L51/5203 ,  Y10S977/701 ,  Y10S977/742 ,  Y10S977/762 ,  Y10S977/767 ,  Y10S977/932 ,  Y10S977/936 ,  Y10S977/937 ,  Y10S977/938

Abstract: Embodiments of the invention relate to vertical field effect transistor that is a light emitting transistor. The light emitting transistor incorporates a gate electrode for providing a gate field, a first electrode comprising a dilute nanotube network for injecting a charge, a second electrode for injecting a complementary charge, and an electroluminescent semiconductor layer disposed intermediate the nanotube network and the electron injecting layer. The charge injection is modulated by the gate field. The holes and electrons, combine to form photons, thereby causing the electroluminescent semiconductor layer to emit visible light. In other embodiments of the invention a vertical field effect transistor that employs an electrode comprising a conductive material with a low density of states such that the transistors contact barrier modulation comprises barrier height lowering of the Schottky contact between the electrode with a low density of states and the adjacent semiconductor by a Fermi level shift.

Abstract translation: 本发明的实施例涉及作为发光晶体管的垂直场效应晶体管。 发光晶体管包括用于提供栅极场的栅电极，包括用于注入电荷的稀释纳米管网络的第一电极，用于注入互补电荷的第二电极和设置在纳米管网络之间的电致发光半导体层和电子注入 层。 电荷注入由栅极场调制。 空穴和电子结合形成光子，从而使电致发光半导体层发射可见光。 在本发明的其它实施例中，采用包括具有低密度状态的导电材料的电极的垂直场效应晶体管，使得晶体管接触势垒调制包括具有低密度状态的电极之间的肖特基接触的势垒高度降低，以及 相邻的半导体通过费米能级移位。

公开(公告)号：US08564048B2

公开(公告)日：2013-10-22

申请号：US13528953

申请日：2012-06-21

Applicant: Andrew Gabriel Rinzler ,  Bo Liu ,  Mitchell Austin McCarthy ,  John Robert Reynolds ,  Franky So

Inventor： Andrew Gabriel Rinzler ,  Bo Liu ,  Mitchell Austin McCarthy ,  John Robert Reynolds ,  Franky So

IPC: H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC classification number: H01L51/5296 ,  B82Y10/00 ,  B82Y20/00 ,  B82Y30/00 ,  H01L51/0039 ,  H01L51/0043 ,  H01L51/0048 ,  H01L51/0558 ,  H01L51/057 ,  H01L51/102 ,  H01L51/5203 ,  Y10S977/701 ,  Y10S977/742 ,  Y10S977/762 ,  Y10S977/767 ,  Y10S977/932 ,  Y10S977/936 ,  Y10S977/937 ,  Y10S977/938

Abstract: Embodiments of the invention relate to field effect transistors. The field effect transistor includes a gate electrode for providing a gate field, a first electrode including a conductive material having a low carrier density and a low density of electronic states, a second electrode, and a semiconductor. Contact barrier modulation includes barrier height lowering of a Schottky contact between the first electrode and the semiconductor. In some embodiments of the invention, a vertical field effect transistor employs an electrode comprising a conductive material with a low density of states such that the transistors contact barrier modulation comprises barrier height lowering of the Schottky contact between the electrode with a low density of states and the adjacent semiconductor by a Fermi level shift.

Abstract translation: 本发明的实施例涉及场效应晶体管。 场效应晶体管包括用于提供栅极场的栅电极，包括具有低载流子密度和低密度电子状态的导电材料的第一电极，第二电极和半导体。 接触势垒调制包括第一电极和半导体之间的肖特基接触的势垒高度降低。 在本发明的一些实施例中，垂直场效应晶体管采用包括具有低密度状态的导电材料的电极，使得晶体管接触势垒调制包括具有低密度状态的电极之间的肖特基接触的势垒高度降低;以及 相邻的半导体通过费米能级移位。