公开(公告)号：US4926376A

公开(公告)日：1990-05-15

申请号：US380680

申请日：1989-07-14

申请人： Paolo Rosini

发明人： Paolo Rosini

IPC分类号： H01L21/82 ,  G06F13/40 ,  G06F15/78 ,  H01L21/822 ,  H01L25/04 ,  H01L25/18 ,  H01L27/04 ,  H05K7/14

CPC分类号： H05K7/1429 ,  G06F13/409

摘要： The microcomputer is assembled by association of a variable plurality of rectangular functional modules having a fixed first dimension and a variable second dimension. Common busses electrically connect the various modules automatically.

摘要翻译： 微型计算机通过可变多个具有固定的第一维度和可变第二维度的矩形功能模块的关联来组装。 普通总线自动电连接各种模块。

公开(公告)号：US4956569A

公开(公告)日：1990-09-11

申请号：US373203

申请日：1989-06-30

申请人： Marco Olivo ,  Luigi Pascucci ,  Carlo Riva ,  Paolo Rosini ,  Corrado Villa

发明人： Marco Olivo ,  Luigi Pascucci ,  Carlo Riva ,  Paolo Rosini ,  Corrado Villa

IPC分类号： H01L21/8238 ,  H01L27/092 ,  H03K3/356 ,  H03K3/3565 ,  H03K19/003

CPC分类号： H03K19/00315 ,  H03K3/356104 ,  H03K3/3565

摘要： A CMOS logic circuit for converting a low voltage logic signal with a range O-VCC into a high voltage logic signal with a range O-VPP, which may be entirely made with enhancement-type transistors, comprises an additional p-channel, decoupling transistor functionally connected in series with the p-channel transistor of the CMOS circuit which is connected to the high voltage node VPP and the additional decoupling transistor is driven by a bias voltage tied to the VPP voltage and lower than the latter by a certain preset value. The so-called gated breakdown of p-channel transistors is effectively prevented and furthermore these circuits, destined to operate under a high supply voltage, may be fabricated through a normal CMOS fabrication process not requiring particular fabrication techniques for the p-channel transistors subject to gated breakdown conditions or the formation of depletion-type transistors and without the use of special circuits which require oscillator generated driving signals.

公开(公告)号：US4609999A

公开(公告)日：1986-09-02

申请号：US572453

申请日：1984-01-20

申请人： Paolo Rosini

发明人： Paolo Rosini

IPC分类号： G11C14/00 ,  G11C11/40 ,  G11C7/00

CPC分类号： G11C14/00

摘要： The cell is realized according to a bistable structure which includes a non-volatile memory element. During the normal operation the structure operates as a static RAM cell with the non-volatile element excluded from the circuit. In case of turn-off of the supply line or after suitable control signals, a particular circuit arrangement allows to execute the programming operation of the non-volatile element, that is the information storage, without current absorption. At the turn-on, the automatic reinstatement of the stored information occurs.

摘要翻译： 该单元根据包括非易失性存储元件的双稳态结构来实现。 在正常操作期间，该结构作为静态RAM单元操作，其中不包括电路的非易失性元件。 在供电线路关断的情况下或在适当的控制信号之后，特定的电路装置允许执行非易失性元件（即信息存储器）的编程操作，而不进行电流吸收。 在开启时，会自动恢复存储的信息。

公开(公告)号：US4638465A

公开(公告)日：1987-01-20

申请号：US575686

申请日：1984-01-31

申请人： Paolo Rosini ,  Roberto Finaurini ,  Maurizio Gaibotti

发明人： Paolo Rosini ,  Roberto Finaurini ,  Maurizio Gaibotti

IPC分类号： G11C14/00 ,  G06F1/30 ,  G06F15/78 ,  G11C11/40

CPC分类号： G06F1/30

摘要： An integrated structure composed of a processing unit (CPU), ROM memory, RAM memory and other optional functions, such as input/output etc., is arranged as a microcomputer, in which all or part of the RAM is a non-volatile memory which carries out during normal operation all the functions of a RAM while also being able, through suitable circuit structures, to store in a permanent (non-volatile) way the data contained therein, retaining the data when the power feed to the circuit is cut off, and recalling the same data at power turn-on.The structure provides for the handling of the non-volatile memory in its different functions, and its arrangement and compatibility with the processing unit, through suitable circuitry and control signals.

摘要翻译： 由处理单元（CPU），ROM存储器，RAM存储器和诸如输入/输出等的其他可选功能组成的集成结构被布置为微计算机，其中RAM的全部或部分是非易失性存储器 其在正常操作期间执行RAM的所有功能，同时还能够通过适当的电路结构以永久（非易失性）方式存储其中包含的数据，当切断对电路的馈电时保留数据 关闭，并在电源开启时调用相同的数据。 该结构通过适当的电路和控制信号提供其不同功能中的非易失性存储器的处理及其与处理单元的配置和兼容性。