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    Method for making a substantially planar micro-fluid ejection head
    2.
    发明授权
    Method for making a substantially planar micro-fluid ejection head 有权
    制造基本上平面的微流体喷射头的方法

    公开(公告)号：US08826502B2

    公开(公告)日：2014-09-09

    申请号：US12786457

    申请日：2010-05-25

    申请人： David Laurier Bernard ,  Paul William Dryer ,  Andrew Lee McNees

    发明人： David Laurier Bernard ,  Paul William Dryer ,  Andrew Lee McNees

    IPC分类号： H04R17/00 ,  B41J2/16 ,  C09J5/02 ,  B41J2/14

    CPC分类号： C09J5/02 ,  B41J2/16 ,  B41J2/1623 ,  B41J2/1642 ,  B41J2/1645 ,  B41J2/1646 ,  B41J2002/14491 ,  C09J2400/146 ,  Y10T29/42 ,  Y10T29/49002 ,  Y10T29/49401 ,  Y10T156/1056

    摘要： A process for making a substantially planar micro-fluid ejection head is disclosed, and includes depositing a basic solution on a first surface of a device substrate. The first surface having the basic solution deposited thereon is contacted together with a surface of a support material for a duration ranging from about 1 minute to about 15 minutes, at a temperature ranging from about 20° C. to about 90° C. so that the first surface having the basic solution deposited thereon and the surface of the support material form a bond therebetween to hermetically seal the support material and the device substrate to one another. Both the substrate and the at least one surface of the support comprise silicon, and at least one of the device substrate and the at least one surface of the support material is substantially composed of silicon.

    摘要翻译： 公开了一种用于制造基本上平面的微流体喷射头的方法，并且包括将碱性溶液沉积在器件衬底的第一表面上。 将沉积有碱性溶液的第一表面与载体材料的表面在约20℃至约90℃的温度范围内从约1分钟至约15分钟的时间范围内接触一段时间，从而使得 第一表面具有沉积在其上的基本溶液，并且支撑材料的表面在其间形成结合，以将支撑材料和器件基板彼此密封。 衬底和支撑体的至少一个表面都包括硅，并且器件衬底和支撑材料的至少一个表面中的至少一个基本上由硅组成。

    Heater chips with silicon die bonded on silicon substrate
    5.
    发明授权
    Heater chips with silicon die bonded on silicon substrate 有权
    硅芯片加热芯片焊接在硅基板上

    公开(公告)号：US08087756B2

    公开(公告)日：2012-01-03

    申请号：US13102091

    申请日：2011-05-06

    申请人： Frank Edward Anderson ,  David Laurier Bernard ,  Paul William Dryer ,  Burton Lee Joyner, II ,  Andrew Lee McNees ,  Timothy Lowell Strunk ,  Carl Edmond Sullivan

    发明人： Frank Edward Anderson ,  David Laurier Bernard ,  Paul William Dryer ,  Burton Lee Joyner, II ,  Andrew Lee McNees ,  Timothy Lowell Strunk ,  Carl Edmond Sullivan

    IPC分类号： B41J2/05

    CPC分类号： B41J2/1603 ,  B41J2/1629 ,  B41J2/1631 ,  B41J2/1632 ,  B41J2/164 ,  H01L21/6715 ,  Y10T29/49401

    摘要： A heater chip has a substrate and at least one die, made of silicon, and a bond non-adhesively attaching them. The substrate, thick enough to resist bowing, has ink supply vias from back to front surfaces. The die has ink flow vias from back to front surfaces and circuitry including heater elements adjacent the front surface interspersed with ink flow vias. The at least one die is superimposed on the substrate such that ink supply vias of the substrate align with ink flow vias of the die and portions of substrate front surface and die back surface are aligned, disposed adjacent and facing one another. The bond formed between substrate and die facing surface portions is hermetic and equal in strength to a Si—O bond. A metal through the die connects a conductor on a front of the substrate to a heater element on a front of the die.

    摘要翻译： 加热器芯片具有基板和至少一个由硅制成的管芯，以及非粘合地连接的管芯。 厚度足以抵抗弯曲的基材具有从后表面到前表面的墨水供应通孔。 模具具有从背面到表面的墨水流通孔，以及包括与前述表面相邻的加热元件的电路，其中散布着墨水通孔。 至少一个管芯叠加在衬底上，使得衬底的供墨通孔与管芯的墨流过孔对准，并且衬底前表面和管芯后表面的部分相邻并相对设置地排列。 在衬底和面向芯片的表面部分之间形成的结合是密封的，并且与Si-O键的强度相等。 通过模具的金属将基板前部的导体连接到模具前部的加热元件。

    METHODS FOR PLANARIZING UNEVENNESS ON SURFACE OF WAFER PHOTORESIST LAYER AND WAFERS PRODUCED BY THE METHODS
    7.
    发明申请
    METHODS FOR PLANARIZING UNEVENNESS ON SURFACE OF WAFER PHOTORESIST LAYER AND WAFERS PRODUCED BY THE METHODS 有权
    在方法生产的波长光电子层和波长表面上平坦化的方法

    公开(公告)号：US20090258322A1

    公开(公告)日：2009-10-15

    申请号：US12100716

    申请日：2008-04-10

    申请人： David Laurier Bernard ,  Paul William Dryer ,  Andrew Lee McNees

    发明人： David Laurier Bernard ,  Paul William Dryer ,  Andrew Lee McNees

    IPC分类号： G03F7/20

    CPC分类号： G03F7/094

    摘要： A wafer has a substrate and a photoresist layer thereon with a surface that is planarized by positioning over a starting surface of the photoresist layer a gray-scale mask having a pattern that correlates with a gradient height profile of unevenness present on the starting surface, patterning the photoresist layer using the gray-scale mask to produce the pattern thereof in the photoresist layer which, in effect, produces a profile of evenness in the photoresist layer underlying the gradient height profile of unevenness, and developing the patterned photoresist layer such that only a three-dimensional portion thereof corresponding to the gradient height profile of unevenness located above the profile of evenness is removed which, in effect, leaves behind a resulting surface on the photoresist layer made substantially more even and thus substantially in a planarized condition.

    摘要翻译： 晶片具有基板及其上的光致抗蚀剂层，其表面通过在光致抗蚀剂层的起始表面上定位而形成平面化的灰度掩模，该灰度掩模具有与存在于起始表面上的不均匀性的梯度高度分布相关联的图案，图案化 使用灰度掩模的光致抗蚀剂层在光致抗蚀剂层中产生其图案，其实际上在凹凸的梯度高度分布下的光致抗蚀剂层中产生均匀度的轮廓，并且显影图案化的光致抗蚀剂层，使得只有 去除其对应于位于均匀轮廓之上的凹凸的梯度高度轮廓的三维部分，其实际上留在光致抗蚀剂层上形成的基本上更均匀且因此基本上处于平坦状态的所得表面之后。