摘要:
Embodiments of the present disclosure provide a method comprising processing a first pixel of a continuous tone image to generate a first error, the first error representative of a difference between an input level and an output level associated with the first pixel; and in response to processing the first pixel, assigning a random error to a second pixel that is neighboring the first pixel, wherein the assigned random error is independent of the first error. Other embodiments are also described and claimed.
摘要:
An integrated circuit includes a first die and a second die positioned in a package. The first die has a redistribution layer formed on the die and including a plurality of relocated bond pads. The relocated bond pads are positioned near an inner edge of the first die that is adjacent to an inner edge of the second die. Each relocated bond pad is coupled to a corresponding bond pad on the second die through a respective bonding wire. The first die further includes a plurality of original bond pads. The redistribution layer further includes at least one intermediate bond pad electrically interconnected through a respective conductive trace to a corresponding original bond pad. Each intermediate bond pad is electrically connected to a corresponding relocated bond pad through a respective bond wire.
摘要:
Embodiments of the present invention provide techniques and configurations for error diffusion halftoning of an image including receiving a signal that indicates selection of a first implementation or a second implementation of determining a threshold perturbation value for error diffusion halftoning of an image, and determining the threshold perturbation value using a table of programmable values according to the selected one of the first implementation or the second implementation, wherein the second implementation provides fewer threshold perturbation values for a larger region of the image than the first implementation. Other embodiments may be described and/or claimed.
摘要:
Aspects of the disclosure provide a method and an apparatus that can ensure transferring a page over a communication link having a transfer rate to satisfy a print rate by reducing a data size of the page. The method for printing a page can include allocating a transfer rate to a printer having a print rate, generating a first printable raster page at a first print quality, determining whether the first printable raster page can be transferred to the printer at the transfer rate and satisfy the print rate of the printer, generating a second printable raster page at a second print quality that is lower than the first print quality, when the first printable raster page can not be transferred to the printer at the transfer rate and satisfy the print rate of the printer, and transferring the second printable raster page to the printer.
摘要:
An integrated circuit or chip includes a first die and a second die positioned on a lead frame of a package including a lead frame, such as a QFP, DIP, PLCC, TSOP, or any other type of package including a lead frame. The integrated circuit further includes a redistribution layer formed on the first die to couple selected bond fingers of the lead frame to selected bonding pads of the first and second die. The selected bond fingers may correspond to bond fingers that receive a first supply voltage or the first supply voltage and a second supply voltage.
摘要:
Apparatus for receiving and automatically storing data words according to magnitude is provided. A self-sorting stack embodying the invention comprises a sorting device comprising means for simultaneously comparing the incoming data with the contents of each stack register, and logic and switching means for automatically inserting the new data into the correct register on the stack while at the same time pushing the contents of that and subsequent registers down one location. The entire operation is performed in one clock cycle, the same as for a conventional nonsorting stack.
摘要:
A method and device for improving the processing performance of a transform engine by off-loading the processing of those input polygons which have no more than a predetermined number of edges and decomposing such polygons into trapezoids which can be rendered by a scan conversion system. This is accomplished in accordance with the invention by reading edge data of each input polygon into a RAM and determining the relative positions of the Y coordinates of end points of each edge so that the beginning and end of each respective edge of the polygon in the Y direction may be determined. The polygon is then broken into trapezoids by reading in the respective beginning points of respective edges of the polygon and proceeding until the end point of one of the edges is reached. At the end of one edge, another edge of the polygon is read in, and the process continues until all trapezoids in the polygon have been drawn. Since trapezoids may be much more efficiently handled by the scan conversion system, a significant performance enhancement in the polygon processing is made possible in accordance with the invention.
摘要:
Semi-volatile NAND flash memory systems, apparatuses, and methods for use are described herein. According to various embodiments, a semi-volatile NAND flash memory may be partitioned into various retention regions. Other embodiments may be described and claimed.
摘要:
Halftoning apparatus and method that may generate and employ average values and shifts are described herein. The apparatus may include an unpacker to determine shifts and average values for a plurality of input pixel values, each pair of average value and shift being associated with a corresponding pair of the input pixel values. The apparatus may further include a halftone core coupled to the unpacker to receive the shifts and the average values from the unpacker and to generate pairs of output pixel values based at least in part on the received shifts and average values, wherein the output pixel values are for generating pixels of an image.
摘要:
Semi-volatile NAND flash memory systems, apparatuses, and methods for use are described herein. According to various embodiments, a semi-volatile NAND flash memory may be partitioned into various retention regions. Other embodiments may be described and claimed.