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Patent Agency Ranking
公开(公告)号：US20100167466A1
公开(公告)日：2010-07-01
申请号：US12347800
申请日：2008-12-31
Applicant: Ravikumar Adimula , Myung Jin Yim
Inventor： Ravikumar Adimula , Myung Jin Yim
CPC classification number: H05K3/323 , H01L23/3121 , H01L23/49811 , H01L24/48 , H01L2224/48091 , H01L2224/48227 , H01L2924/00011 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/07802 , H01L2924/15311 , H01L2924/181 , H01L2924/19043 , H05K2201/10719 , Y10T29/4913 , Y10T29/49144 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2924/01005 , H01L2924/01004 , H01L2924/01033
Abstract: An apparatus and method of making a package substrate with metal bumps is presented. The package substrate comprises a substrate base and a plurality of metal bumps which are formed on the substrate base. A microelectronic die may thereafter be attached to the package substrate. Also presented is a method for attaching the package substrate to a printed circuit board (PCB).
Abstract translation: 提出了一种制造具有金属凸块的封装衬底的装置和方法。 封装衬底包括衬底基底和形成在衬底基底上的多个金属凸块。 此后可以将微电子管芯附接到封装衬底。 还提出了一种将封装衬底附着到印刷电路板（PCB）的方法。
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2.发明授权Package including at least one topological feature on an encapsulant material to resist out-of-plane deformation 有权封装包括在封装材料上的至少一个拓扑特征以抵抗面外变形公开(公告)号：US08653675B2
公开(公告)日：2014-02-18
申请号：US12628042
申请日：2009-11-30
Applicant: James Jian Zhang , Jason Brand , Jacob Brooksby , Dejen Eshete , Myung Jin Yim , Ravikumar Adimula , Dan Graves
Inventor： James Jian Zhang , Jason Brand , Jacob Brooksby , Dejen Eshete , Myung Jin Yim , Ravikumar Adimula , Dan Graves
CPC classification number: H01L23/562 , H01L21/565 , H01L23/3121 , H01L23/544 , H01L24/48 , H01L25/0657 , H01L2223/5442 , H01L2223/54486 , H01L2224/32145 , H01L2224/48091 , H01L2224/48227 , H01L2225/0651 , H01L2225/06589 , H01L2924/00014 , H01L2924/181 , H01L2924/1815 , H01L2224/45099 , H01L2924/00012
Abstract: Embodiments include but are not limited to apparatuses and systems including semiconductor packages, e.g. memory packages, including a die and an encapsulant material formed over the die, and at least one topological feature formed on an external surface of the encapsulant material, and configured to resist out-of-plane deformation of the package. Other embodiments may be described and claimed.
Abstract translation: 实施例包括但不限于包括半导体封装的设备和系统。 存储器封装，包括在管芯上形成的管芯和密封剂材料，以及形成在密封剂材料的外表面上的至少一个拓扑特征，并且被配置为抵抗封装的平面外变形。 可以描述和要求保护其他实施例。
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3.发明申请公开(公告)号：US20110127642A1
公开(公告)日：2011-06-02
申请号：US12628042
申请日：2009-11-30
Applicant: James Jian Zhang , Jason Brand , Jacob Brooksby , Dejen Eshete , Myung Jin Yim , Ravikumar Adimula , Dan Graves
Inventor： James Jian Zhang , Jason Brand , Jacob Brooksby , Dejen Eshete , Myung Jin Yim , Ravikumar Adimula , Dan Graves
IPC: H01L23/544 , H01L21/26
CPC classification number: H01L23/562 , H01L21/565 , H01L23/3121 , H01L23/544 , H01L24/48 , H01L25/0657 , H01L2223/5442 , H01L2223/54486 , H01L2224/32145 , H01L2224/48091 , H01L2224/48227 , H01L2225/0651 , H01L2225/06589 , H01L2924/00014 , H01L2924/181 , H01L2924/1815 , H01L2224/45099 , H01L2924/00012
Abstract: Embodiments include but are not limited to apparatuses and systems including semiconductor packages, e.g. memory packages, including a die and an encapsulant material formed over the die, and at least one topological feature formed on an external surface of the encapsulant material, and configured to resist out-of-plane deformation of the package. Other embodiments may be described and claimed.
Abstract translation: 实施例包括但不限于包括半导体封装的设备和系统。 存储器封装，包括在管芯上形成的管芯和密封剂材料，以及形成在密封剂材料的外表面上的至少一个拓扑特征，并且被配置为抵抗封装的平面外变形。 可以描述和要求保护其他实施例。
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公开(公告)号：US08344491B2
公开(公告)日：2013-01-01
申请号：US12347738
申请日：2008-12-31
Applicant: Ravikumar Adimula , Myung Jin Yim
Inventor： Ravikumar Adimula , Myung Jin Yim
IPC: H01L23/02
CPC classification number: H01L23/4985 , H01L23/3128 , H01L23/5387 , H01L24/50 , H01L24/86 , H01L25/0652 , H01L25/0657 , H01L25/16 , H01L2225/06517 , H01L2225/06572 , H01L2225/06579 , H01L2924/01005 , H01L2924/01006 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01079 , H01L2924/014 , H01L2924/07811 , H01L2924/14 , H01L2924/1461 , H01L2924/15311 , H01L2924/30105 , H01L2924/00
Abstract: A multi-die building block for a stacked-die package is described. The multi-die building block includes a flex tape having a first surface and a second surface, each surface including a plurality of electrical traces. A first die is coupled, through a first plurality of interconnects, to the plurality of electrical traces of the first surface of the flex tape. A second die is coupled, through a second plurality of interconnects, to the plurality of electrical traces of the second surface of the flex tape.
Abstract translation: 描述了用于堆叠管芯封装的多管芯构建块。 多模构造块包括具有第一表面和第二表面的柔性带，每个表面包括多个电迹线。 第一管芯通过第一多个互连件连接到柔性带的第一表面的多个电迹线。 第二管芯通过第二多个互连件连接到柔性带的第二表面的多个电迹线。
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公开(公告)号：US20100164085A1
公开(公告)日：2010-07-01
申请号：US12347738
申请日：2008-12-31
Applicant: Ravikumar Adimula , Myung Jin Yim
Inventor： Ravikumar Adimula , Myung Jin Yim
CPC classification number: H01L23/4985 , H01L23/3128 , H01L23/5387 , H01L24/50 , H01L24/86 , H01L25/0652 , H01L25/0657 , H01L25/16 , H01L2225/06517 , H01L2225/06572 , H01L2225/06579 , H01L2924/01005 , H01L2924/01006 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01079 , H01L2924/014 , H01L2924/07811 , H01L2924/14 , H01L2924/1461 , H01L2924/15311 , H01L2924/30105 , H01L2924/00
Abstract: A multi-die building block for a stacked-die package is described. The multi-die building block includes a flex tape having a first surface and a second surface, each surface including a plurality of electrical traces. A first die is coupled, through a first plurality of interconnects, to the plurality of electrical traces of the first surface of the flex tape. A second die is coupled, through a second plurality of interconnects, to the plurality of electrical traces of the second surface of the flex tape.
Abstract translation: 描述了用于堆叠管芯封装的多管芯构建块。 多模构造块包括具有第一表面和第二表面的柔性带，每个表面包括多个电迹线。 第一管芯通过第一多个互连件连接到柔性带的第一表面的多个电迹线。 第二管芯通过第二多个互连件连接到柔性带的第二表面的多个电迹线。
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