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    Computer system comprising a host connected to a disk drive employing state variable trap registers for providing stored servo and user data state variables to sampled-data channel
    1.
    发明授权
    Computer system comprising a host connected to a disk drive employing state variable trap registers for providing stored servo and user data state variables to sampled-data channel 有权
    计算机系统包括连接到采用状态变量陷阱寄存器的磁盘驱动器的主机，用于向采样数据信道提供存储的伺服和用户数据状态变量

    公开(公告)号：US06487032B1

    公开(公告)日：2002-11-26

    申请号：US10083745

    申请日：2002-02-25

    申请人： Robert L. Cloke ,  Vafa James Rakshani ,  Richard W. Hull ,  David P. Turner

    发明人： Robert L. Cloke ,  Vafa James Rakshani ,  Richard W. Hull ,  David P. Turner

    IPC分类号： G11B509

    CPC分类号： G11B20/10055 ,  G11B5/5965 ,  G11B20/10009 ,  G11B20/10037 ,  G11B20/1217 ,  G11B20/1258 ,  G11B20/1403 ,  G11B27/3027 ,  G11B2020/10888 ,  G11B2020/1232 ,  G11B2020/1267 ,  G11B2020/1275 ,  G11B2020/1282 ,  G11B2020/1287 ,  G11B2020/1292 ,  G11B2220/20 ,  G11B2220/2516

    摘要： A computer system is disclosed comprising a host connected to a disk drive, the disk drive comprising a disk surface having a plurality of tracks arranged in an embedded servo format including servo track segments for storing servo data and data track segments for storing user data. The disk drive includes a read element operative during a user-data read operation for reading data from the disk surface to produce a time-multiplexed analog read signal that during a revolution of the disk represents analog read servo data during each of a first set of time intervals and represents analog read user data during each of a second set of time intervals. The disk drive includes a sampled signal processing circuit that generates a servo state variable while processing the time-multiplexed read signal during the first servo time interval and a user data state variable while processing the time-multiplexed read signal during the first user data time interval. The disk drive includes a servo state variable trap register for storing the servo state variable at the end of the first servo time interval. The disk drive includes a data state variable trap register for storing the user data state variable at the end of the first user data time interval. The disk drive includes a control circuit for providing the stored servo state variable to the sampled signal processing circuit at the beginning of the second servo time interval. The control circuit provides the stored user data state variable to the sampled signal processing circuit at the beginning of the second user data time interval.

    摘要翻译： 公开了一种计算机系统，包括连接到磁盘驱动器的主机，磁盘驱动器包括具有以嵌入式伺服格式布置的多个磁道的磁盘表面，包括用于存储伺服数据的伺服磁道段和用于存储用户数据的数据磁道段。 磁盘驱动器包括在用户数据读取操作期间操作用于从盘表面读取数据的读取元件，以产生时间复用的模拟读取信号，该时间复用模拟读取信号在盘的转动期间代表模拟读取伺服数据，每个第一组 时间间隔，并且在第二组时间间隔中的每一个期间表示模拟读取用户数据。 磁盘驱动器包括采样信号处理电路，其在第一伺服时间间隔期间处理时间复用的读取信号和在第一用户数据时间间隔期间处理时间复用的读取信号的用户数据状态变量时产生伺服状态变量 。 磁盘驱动器包括伺服状态变量陷阱寄存器，用于在第一伺服时间间隔结束时存储伺服状态变量。 磁盘驱动器包括用于在第一用户数据时间间隔结束时存储用户数据状态变量的数据状态变量陷阱寄存器。 磁盘驱动器包括控制电路，用于在第二伺服时间间隔开始时将所存储的伺服状态变量提供给采样信号处理电路。 控制电路在第二用户数据时间间隔开始时将采集的用户数据状态变量提供给采样信号处理电路。

    Disk drive employing read channel IC with common port for data and servo
    2.
    发明授权
    Disk drive employing read channel IC with common port for data and servo 有权
    磁盘驱动器采用带通用端口的读通道IC，用于数据和伺服

    公开(公告)号：US06278568B1

    公开(公告)日：2001-08-21

    申请号：US09223475

    申请日：1998-12-30

    申请人： Robert L. Cloke ,  Richard W. Hull ,  Vafa James Rakshani ,  David P. Turner

    发明人： Robert L. Cloke ,  Richard W. Hull ,  Vafa James Rakshani ,  David P. Turner

    IPC分类号： G11B509

    CPC分类号： G11B20/10055 ,  G11B5/5965 ,  G11B20/10009 ,  G11B20/10037 ,  G11B20/1217 ,  G11B20/1258 ,  G11B20/1403 ,  G11B27/3027 ,  G11B2020/10888 ,  G11B2020/1232 ,  G11B2020/1267 ,  G11B2020/1275 ,  G11B2020/1282 ,  G11B2020/1287 ,  G11B2020/1292 ,  G11B2220/20 ,  G11B2220/2516

    摘要： A disk drive includes a disk having a disk surface. The disk surface has a plurality of tracks arranged in an embedded servo format including servo track segments for storing servo data and data track segments for storing user data. Data from the disk surface is read to produce a time-multiplexed analog read signal that during a revolution of the disk represents analog read servo data during each of a first set of time intervals and represents analog read user data during each of a second set of time intervals. The disk drive further includes a controller and a channel integrated circuit chip. The controller includes a controller port. The channel integrated circuit chip includes an input for receiving the time-multiplexed analog read signal. The time-multiplexed analog read signal is processed to generate data symbols representing recovered servo data and recovered user data. The channel integrated circuit chip includes a channel port for transferring both the recovered servo data and the recovered user data. The disk drive further includes a communication bus connected between the channel port and the controller port. The channel port transfers both the recovered servo data and the recovered user data to the communication bus. The communication bus transfers both the recovered servo data and the recovered user data to the controller port.

    摘要翻译： 磁盘驱动器包括具有盘表面的盘。 磁盘表面具有以嵌入式伺服格式布置的多个磁道，包括用于存储伺服数据的伺服磁道段和用于存储用户数据的数据磁道段。 读取来自磁盘表面的数据以产生时间复用的模拟读取信号，其在盘的转动期间表示在第一组时间间隔期间的每一个中的模拟读取伺服数据，并且在第二组 时间间隔。 磁盘驱动器还包括控制器和通道集成电路芯片。 控制器包括一个控制器端口。 信道集成电路芯片包括用于接收时间复用的模拟读取信号的输入端。 处理时分复用模拟读取信号以产生表示恢复的伺服数据和恢复的用户数据的数据符号。 通道集成电路芯片包括用于传送恢复的伺服数据和恢复的用户数据的通道端口。 磁盘驱动器还包括连接在通道端口和控制器端口之间的通信总线。 通道端口将恢复的伺服数据和恢复的用户数据传送到通信总线。 通信总线将恢复的伺服数据和恢复的用户数据传送到控制器端口。

    Triple comparator circuit
    4.
    发明授权
    Triple comparator circuit 失效
    三重比较电路

    公开(公告)号：US5115151A

    公开(公告)日：1992-05-19

    申请号：US535177

    申请日：1990-06-08

    申请人： Richard W. Hull ,  Timothy G. O'Shaughnessy

    发明人： Richard W. Hull ,  Timothy G. O'Shaughnessy

    IPC分类号： G01R19/00 ,  H03K5/24

    CPC分类号： H03K5/2481 ,  G01R19/0038

    摘要： A comparator which is used to compare two analog voltages and provide a single ended output comprises three CMOS differential amplifiers. The use of three differential amplifiers provides improved matching of input capacitance, and a reduction in propagation delay over prior art use of a single differential amplifier. The comparator may be adopted for use in certain CMOS processes to extend the maximum operating voltage by limiting the internal node voltages otherwise subject to damage from impact ionization. An alternative embodiment is disclosed for comparing two analog voltages that are outside the power supply voltage range.

    摘要翻译： 用于比较两个模拟电压并提供单端输出的比较器包括三个CMOS差分放大器。 使用三个差分放大器提供输入电容的改进的匹配，并且与现有技术中使用单个差分放大器相比传播延迟的减小。 比较器可用于某些CMOS工艺中，以通过限制内部节点电压来延长最大工作电压，否则将受到冲击电离的损害。 公开了用于比较在电源电压范围之外的两个模拟电压的替代实施例。

    Digital-to-analog converter with bit weight segmented arrays
    5.
    发明授权
    Digital-to-analog converter with bit weight segmented arrays 失效
    具有位权重分段阵列的数模转换器

    公开(公告)号：US5017919A

    公开(公告)日：1991-05-21

    申请号：US533885

    申请日：1990-06-06

    申请人： Richard W. Hull ,  Timothy G. O'Shaughnessy

    发明人： Richard W. Hull ,  Timothy G. O'Shaughnessy

    IPC分类号： H03M1/68 ,  H03M1/74

    CPC分类号： H03M1/682 ,  H03M1/747

    摘要： A DAC embodied in a CMOS integrated circuit converts a multi-bit digital signal to an analog-current signal. A higher-order portion of the digital signal, e.g., the most significant 5 bits of a byte, are decoded separately from the lower-order portion, e.g., the 3 least significant bits. The DAC includes circuitry for producing a first bias voltage, a first set of current sources each biased by the first bias voltage to produce a switchable current having a unit magnitude, and switching circuitry controlled by the decoded lower-order portion to cause a selected number of the unit-magnitude currents to contribute to the analog-current signal. The DAC further includes circuitry for producing a second bias voltage, a second set of current sources each biased by the second bias voltage to produce a switchable current having a multi-unit magnitude, and switching circuitry controlled by the decoded higher-order portion to cause a selected number of the multi-unit-magnitude currents to contribute to the analog-current signal.

    摘要翻译： CMOS集成电路中实现的DAC将多位数字信号转换为模拟电流信号。 数字信号的高阶部分（例如，一个字节的最高有效5位）与低阶部分（例如3个最低有效位）分开解码。 DAC包括用于产生第一偏置电压的电路，第一组电流源，每个电流源由第一偏置电压偏置以产生具有单位幅度的可切换电流，以及由解码的低阶部分控制的开关电路以引起所选择的数量 的单位幅度电流有助于模拟电流信号。 DAC还包括用于产生第二偏置电压的电路，每个由第二偏置电压偏置以产生具有多单位幅度的可切换电流的第二组电流源，以及由解码的高阶部分控制的开关电路， 选择数量的多单位幅度电流以有助于模拟电流信号。

    MOS Phase lock loop synchronization circuit
    6.
    发明授权
    MOS Phase lock loop synchronization circuit 失效
    MOS锁相环同步电路

    公开(公告)号：US4519086A

    公开(公告)日：1985-05-21

    申请号：US388899

    申请日：1982-06-16

    申请人： Richard W. Hull ,  Leonard Teslenko

    发明人： Richard W. Hull ,  Leonard Teslenko

    IPC分类号： H03L7/089 ,  H03L7/099 ,  H03L7/06

    CPC分类号： H03L7/0891 ,  H03L7/0995 ,  Y10S331/03

    摘要： A metal oxide semiconductor (MOS) phase lock loop data synchronization circuit, for use in conjuction with an integrated circuit disk controller device, comprising a temperature, process, and voltage compensated MOS voltage controlled oscillator (VCO), a three-bit counter, and a phase detector circuit. The phase detector circuit compares a decoded clock signal output from the VCO with incoming data from a disk device to detect phase differences between the frequency of the VCO and the actual frequency of the incoming data. The phase detector produces voltage signals in response to any such phase differences, which are coupled to the VCO and alter the frequency output of the VCO to match the frequency of the incoming data. The counter provides a system read-clock, which is fully synchronized with the incoming data, to an integrated circuit disk controller device which further processes the data.

    摘要翻译： 一种与集成电路盘控制器装置结合使用的金属氧化物半导体（MOS）锁相环数据同步电路，包括温度，过程和电压补偿MOS压控振荡器（VCO），三位计数器和 相位检测电路。 相位检测器电路将从VCO输出的解码时钟信号与来自盘装置的输入数据进行比较，以检测VCO的频率与输入数据的实际频率之间的相位差。 相位检测器响应于任何这样的相位差产生电压信号，这些相位差耦合到VCO并改变VCO的频率输出以匹配输入数据的频率。 该计数器提供与输入数据完全同步的系统读时钟，进一步处理数据的集成电路盘控制器设备。

    Disk drive employing a non-volatile serial semiconductor memory for storing a control program for a microprocessor
    7.
    发明授权
    Disk drive employing a non-volatile serial semiconductor memory for storing a control program for a microprocessor 失效
    采用非易失性串行半导体存储器来存储用于微处理器的控制程序的磁盘驱动器

    公开(公告)号：US07028174B1

    公开(公告)日：2006-04-11

    申请号：US10261565

    申请日：2002-09-30

    申请人： Alireza Atai-Azimi ,  Richard W. Hull ,  Mark F. Vallis

    发明人： Alireza Atai-Azimi ,  Richard W. Hull ,  Mark F. Vallis

    IPC分类号： G06F15/177 ,  G06F9/445

    CPC分类号： G06F21/575 ,  G06F21/14 ,  G11B20/00086 ,  G11B20/00876 ,  G11B2020/1275

    摘要： A disk drive is disclosed comprising a microprocessor, a non-volatile serial semiconductor memory for storing code segments of a control program, a first semiconductor memory for storing code segments of a loader program, and a second semiconductor memory for receiving the code segments of the control program. When the disk drive is powered on, the microprocessor executes the loader program from the first semiconductor memory to load the control program from the non-volatile serial semiconductor memory into the second semiconductor memory. The microprocessor then executes the control program from the second semiconductor memory.

    摘要翻译： 公开了一种磁盘驱动器，其包括微处理器，用于存储控制程序的代码段的非易失性串行半导体存储器，用于存储加载器程序的代码段的第一半导体存储器和用于接收加载程序的代码段的第二半导体存储器 控制程序。 当磁盘驱动器通电时，微处理器从第一半导体存储器执行加载器程序，以将控制程序从非易失性串行半导体存储器加载到第二半导体存储器中。 然后微处理器从第二半导体存储器执行控制程序。

    Disk drive employing dynamically reconfigured read channel to process a read signal at two different frequencies
    8.
    发明授权
    Disk drive employing dynamically reconfigured read channel to process a read signal at two different frequencies 失效
    磁盘驱动器采用动态重新配置的读通道来处理两个不同频率的读信号

    公开(公告)号：US5956196A

    公开(公告)日：1999-09-21

    申请号：US963262

    申请日：1997-10-28

    申请人： Richard W. Hull ,  Marc E. Acosta ,  Carl Bonke ,  Vafa Rakshani ,  Ronald E. Wilson

    发明人： Richard W. Hull ,  Marc E. Acosta ,  Carl Bonke ,  Vafa Rakshani ,  Ronald E. Wilson

    IPC分类号： G11B5/012 ,  G11B5/55 ,  G11B5/596 ,  G11B20/10 ,  G11B20/12 ,  G11B20/14 ,  G11B20/18 ,  G11B21/08 ,  G11B21/10 ,  G11B27/30 ,  G11B5/35

    CPC分类号： G11B20/1883 ,  G11B20/10009 ,  G11B20/1258 ,  G11B21/083 ,  G11B21/106 ,  G11B27/3027 ,  G11B5/012 ,  G11B5/5526 ,  G11B5/59622 ,  G11B5/5965 ,  G11B5/59688 ,  G11B20/1426 ,  G11B2020/10888 ,  G11B2020/1284 ,  G11B2220/20

    摘要： A disk drive having an embedded servo disk format preferably having a fixed-number of radial servo sample wedges per track, in which data blocks are located independently of the servo sample wedge locations of any particular track, and can be split around servo sample wedges. Thus, a fraction of a data block, or more than one data block, can be written between consecutive servo sample wedges, beginning almost anywhere in a data wedge. Each data sector has an associated identification (ID) field that includes at least one segment descriptor. Each segment descriptor describes the data segments into which a data block can be split. Provision is made for as many segment descriptors as there can be data segments for a data block. In general, a segment descriptor is a multi-bit digital signal that defines the absolute or relative location of split data segments (or, alternatively, the absolute or relative length of split data segments, from which the location can be determined). A disk system in accordance with the present invention can be independently optimized for flux changes per inch and tracks per inch, and the size of each data sector can be varied. The invention permits "defect swallowing", by allowing a data sector to be split around small defects within a data wedge of a track, and "wedge push down" defect management, in which a data segment can be started at a next servo sample wedge if a large defect occurs in the previous data wedge.

    摘要翻译： 具有嵌入式伺服盘格式的磁盘驱动器优选地具有固定数量的每个磁道的径向伺服样本楔形，其中数据块独立于任何特定轨道的伺服样本楔形位置定位，并且可以围绕伺服样本楔块分开。 因此，数据块或多于一个数据块的一部分可以写入连续的伺服采样楔之间，几乎在数据楔中的任何地方开始。 每个数据扇区具有包括至少一个段描述符的相关联的标识（ID）字段。 每个段描述符描述可以分割数据块的数据段。 提供了尽可能多的段描述符，因为可以存在数据块的数据段。 通常，段描述符是定义分割数据段的绝对或相对位置（或替代地，分割数据段的绝对或相对长度，可以确定位置的绝对或相对长度）的多位数字信号。 根据本发明的磁盘系统可以独立地针对每英寸的磁通量变化和每英寸磁道进行优化，并且可以改变每个数据扇区的大小。 本发明允许通过允许数据扇区在轨道的数据楔形内的小缺陷处被分割，并且“楔形下推”缺陷管理可以在下一个伺服采样楔形开始时进行“缺陷吞咽” 如果在先前的数据楔中发生大的缺陷。

    Tri-bit encoding for disk drive servo track ID information
    9.
    发明授权
    Tri-bit encoding for disk drive servo track ID information 失效
    用于磁盘驱动器伺服磁道ID信息的三位编码

    公开(公告)号：US5600499A

    公开(公告)日：1997-02-04

    申请号：US45583

    申请日：1993-04-09

    申请人： Marc E. Acosta ,  Richard W. Hull ,  Michael Spaur

    发明人： Marc E. Acosta ,  Richard W. Hull ,  Michael Spaur

    IPC分类号： G11B5/596 ,  H03M5/18 ,  G11B5/09

    CPC分类号： G11B5/59633 ,  H03M5/18

    摘要： A format for embedded servo track identification fields in rotating disk data storage units such as magnetic disk drives. The present invention uses the concept of tri-bits (i.e., three code bits per logical bit) to encode track identification information in servo wedges of embedded servo disk drive systems. More specifically, two particular sets (and their equivalents) of tri-bit codes have been discovered to have optimum characteristics for providing a phase coherent encoding of a Gray code that is simple to translate into straight binary code. The properties of such tri-bit encoding limit error propagation to a single bit, which allows for very reliable track identification during movement of a head transducer across tracks (i.e., "seeks"). A full range of Gray scale codes is available since more than two consecutive logical "0"s can be reliably decoded when encoded using such tri-bits. The properties of such tri-bit encoding also allow for relatively high servo channel rates, which results in a reduction in servo field length. Accordingly, a counter-intuitive result of increasing the length of the encoding symbols for track identification fields is to decrease the overall length of the servo field, thereby permitting an increase in areal density.

    摘要翻译： 旋转磁盘数据存储单元（如磁盘驱动器）中嵌入式伺服磁道识别字段的格式。 本发明使用三位（即，每个逻辑位的三个码位）的概念在嵌入式伺服盘驱动系统的伺服楔中编码轨迹识别信息。 更具体地，已经发现三比特码的两个特定集合（及其等同物）具有用于提供简单转换成直的二进制码的格雷码的相位相干编码的最佳特性。 这种三位编码限制误差传播到单个位的属性，这允许在头部换能器在轨道上移动期间（即，“寻找”）的非常可靠的轨迹识别。 可以使用全范围的灰度代码，因为当使用这样的三位进行编码时可以可靠地解码两个以上的连续逻辑“0”。 这种三比特编码的性质也允许相对高的伺服信道速率，这导致伺服场长度的减小。 因此，增加用于轨迹识别场的编码符号的长度的反直觉的结果是减小伺服场的总长度，从而允许增加面密度。