THROUGH BOARD STACKING OF MULTIPLE LGA-CONNECTED COMPONENTS
    1.
    发明申请
    THROUGH BOARD STACKING OF MULTIPLE LGA-CONNECTED COMPONENTS 有权
    通过多个LGA连接组件的板堆栈

    公开(公告)号:US20090315168A1

    公开(公告)日:2009-12-24

    申请号:US12543104

    申请日:2009-08-18

    IPC分类号: H01L23/52 H01L21/50

    摘要: A package design is provided where a chip module is connected to a printed circuit board (PCB) via a land grid array (LGA) on the top surface of the PCB, and where a power supply is connected to the PCB via a second LGA on the bottom surface of the PCB. The stack of the chip module, power supply, and LGA is held in place and compressed with actuation hardware forming an adjustable frame. The package allows field replacibility of either the module, or the PS, and provides the shortest possible wiring distance from the PS to the module leading to higher performance.

    摘要翻译: 提供了一种封装设计,其中芯片模块通过PCB顶表面上的焊盘网格阵列(LGA)连接到印刷电路板(PCB),并且电源通过第二个LGA连接到PCB PCB的底面。 芯片模块,电源和LGA的堆叠被保持就位并用致动硬件压缩形成可调节的框架。 该封装允许模块或PS的现场可替代性,并提供从PS到模块的最短可能布线距离,从而实现更高的性能。

    Exposure compensation for a line scan camera
    5.
    发明授权
    Exposure compensation for a line scan camera 失效
    线扫描相机的曝光补偿

    公开(公告)号:US4920429A

    公开(公告)日:1990-04-24

    申请号:US301622

    申请日:1989-01-24

    IPC分类号: H04N1/407 G06T1/00 H04N5/235

    CPC分类号: H04N5/2353

    摘要: A scanning imager is described which includes a line camera and a table to mechanically present successive regions of an item to be imaged. The time of exposure of the camera for each successive region presented is controlled by encoding strips connected to the table. Thus, if the table is subjected to motion variations, the encoding strips are likewise affected and vary the exposure time for each analog image pixel scan. To compensate, an exposure correction system is provided which includes an analog voltage generator whose output is related to each successive region exposure time. An A to D conversion circuit is responsive to the analog voltage to normalize the analog image value from the camera so that, in effect, equal exposure images result.

    Through board stacking of multiple LGA-connected components
    6.
    发明申请
    Through board stacking of multiple LGA-connected components 有权
    通过板堆叠多个LGA连接的组件

    公开(公告)号:US20080054430A1

    公开(公告)日:2008-03-06

    申请号:US11511815

    申请日:2006-08-29

    IPC分类号: H01L23/02

    摘要: A package design is provided where a chip module is connected to a printed circuit board (PCB) via a land grid array (LGA) on the top surface of the PCB, and where a power supply is connected to the PCB via a second LGA on the bottom surface of the PCB. The stack of the chip module, power supply, and LGA is held in place and compressed with actuation hardware forming an adjustable frame. The package allows field replacibility of either the module, or the PS, and provides the shortest possible wiring distance from the PS to the module leading to higher performance.

    摘要翻译: 提供了一种封装设计,其中芯片模块通过PCB顶表面上的焊盘网格阵列(LGA)连接到印刷电路板(PCB),并且电源通过第二个LGA连接到PCB PCB的底面。 芯片模块,电源和LGA的堆叠被保持就位并用致动硬件压缩形成可调节的框架。 该封装允许模块或PS的现场可替代性,并提供从PS到模块的最短可能布线距离,从而实现更高的性能。

    Through board stacking of multiple LGA-connected components
    7.
    发明授权
    Through board stacking of multiple LGA-connected components 有权
    通过板堆叠多个LGA连接的组件

    公开(公告)号:US08278745B2

    公开(公告)日:2012-10-02

    申请号:US12543104

    申请日:2009-08-18

    IPC分类号: H01L23/52

    摘要: A package design is provided where a chip module is connected to a printed circuit board (PCB) via a land grid array (LGA) on the top surface of the PCB, and where a power supply is connected to the PCB via a second LGA on the bottom surface of the PCB. The stack of the chip module, power supply, and LGA is held in place and compressed with actuation hardware forming an adjustable frame. The package allows field replacibility of either the module, or the PS, and provides the shortest possible wiring distance from the PS to the module leading to higher performance.

    摘要翻译: 提供了一种封装设计,其中芯片模块通过PCB顶表面上的焊盘网格阵列(LGA)连接到印刷电路板(PCB),并且电源通过第二个LGA连接到PCB PCB的底面。 芯片模块,电源和LGA的堆叠被保持就位并用致动硬件压缩形成可调节的框架。 该封装允许模块或PS的现场可替代性,并提供从PS到模块的最短可能布线距离,从而实现更高的性能。