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公开(公告)号：US06597207B1
公开(公告)日：2003-07-22
申请号：US10272735
申请日：2002-10-16
IPC分类号： H03K5153
CPC分类号： H03K5/003 , H03F3/45771 , H03K5/2481
摘要： Verniers are provided that substantially eliminate DC offset signals as they convert a differential input signal Sin to a differential output signal Sout with a conversion gain that corresponds to a digital command signal. The verniers are especially suited for use with multiplying digital-to-analog converters (MDACs) in communication systems. An exemplary use is forming line drivers to drive load impedances (e.g., coaxial cables).
摘要翻译： 提供游标器，其基本上消除了DC偏移信号，因为它们将差分输入信号Sin转换成具有对应于数字命令信号的转换增益的差分输出信号Sout。 游标器尤其适用于通信系统中的数模转换器（MDAC）的乘法运算。 示例性的用途是形成线路驱动器以驱动负载阻抗（例如同轴电缆）。
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公开(公告)号：US5537079A
公开(公告)日：1996-07-16
申请号：US349261
申请日：1994-12-05
CPC分类号： H03F1/3217 , H03F3/3066
摘要： An IC amplifier having first and second cascaded stages formed by respective pairs of symmetrical complementary bipolar transistors followed by a unity gain buffer amplifier and provided with overall current feedback. The quiescent collector currents of the second amplifier stage are controlled by respective transconductance generators with respective complementary bipolar transistors connected in parallel relationship to the transistors of the second stage. The collector currents of the transconductance generators are fixed at the levels of respective reference current generators.
摘要翻译： 一种IC放大器，具有由相应对的对称互补双极晶体管形成的第一和第二级联级，后面是单位增益缓冲放大器，并提供总电流反馈。 第二放大器级的静态集电极电流由相应的跨导发生器控制，各个互补双极晶体管与第二级的晶体管并联连接。 跨导发生器的集电极电流固定在各个参考电流发生器的电平上。
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公开(公告)号：US5150074A
公开(公告)日：1992-09-22
申请号：US695270
申请日：1991-05-03
申请人： Royal A. Gosser
发明人： Royal A. Gosser
CPC分类号： H03F3/3076
摘要： A transconductance generator including a cross-coupled quad circuit having first and second pairs of complementary transistors, wherein one of the first pair is in series with a complementary one of the second pair, and the other two transistors also are in series. Two input terminals are provided, one for each pair of cross-quad transistors. Two current mirrors are provided, one being coupled to a set of two NPN cross-quad transistors, and the other coupled to the two PNP cross-quad transistors. The cross-quad circuit and the current mirrors provide an output signal through a pair of output transistors. By connecting the output signal to the second input terminal, negative feedback is developed to provide a unity-gain buffer. A number of special compensating circuits are provided to assure minimum distortion effects in the output signal.
摘要翻译： 一种跨导发生器，包括具有第一和第二对互补晶体管的交叉耦合四极电路，其中所述第一对中的一个与所述第二对中的互补串联串联，并且所述另外两个晶体管也是串联的。 提供两个输入端，每对一对交叉晶体管一个。 提供了两个电流镜，一个耦合到一组两个NPN交叉四极晶体管，另一个耦合到两个PNP交叉四极晶体管。 交叉电路和电流镜通过一对输出晶体管提供输出信号。 通过将输出信号连接到第二输入端，产生负反馈以提供单位增益缓冲器。 提供了许多特殊补偿电路以确保输出信号中的最小失真效应。
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4.发明授权Multiplying digital-to-analog converter structures that reduce signal distortion 有权乘以减少信号失真的数模转换器结构公开(公告)号：US06653961B1
公开(公告)日：2003-11-25
申请号：US10272758
申请日：2002-10-16
IPC分类号： H03M166
CPC分类号： H03M1/0614 , H03M1/66
摘要： Mulitplying digital-to-analog converters (MDACs) are provided that reduce signal distortion without significantly raising current demand. These goals are achieved with input structures that lower input impedances and enhance the driving of nonlinear capacitances that are generally presented by the DAC portion of these devices.
摘要翻译： 提供了多模数字模拟转换器（MDAC），可以在不显着提高电流需求的情况下降低信号失真。 这些目标通过输入结构实现，输入结构降低输入阻抗并增强通常由这些器件的DAC部分呈现的非线性电容的驱动。
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公开(公告)号：US06529078B1
公开(公告)日：2003-03-04
申请号：US09935263
申请日：2001-08-22
IPC分类号： H03F345
CPC分类号： H03F3/3066 , H03F3/45174 , H03F2203/45302 , H03F2203/45322
摘要： Transimpedance amplifiers are provided that generate low-distortion output voltage signals with simple, inexpensive structures that are compatible with integrated-circuit fabrication processes. The amplifiers include a current processor and a complementary output stage. The processor provides in-phase upper and lower current signals in response to a differential input current signal and differentially alters respective first and second amplitudes of these signals in response to a common-mode input current signal. The complementary output stage has upper and lower transistors that provide the output voltage signal in respective response to the upper and lower current signals and with distortion that is reduced by the altered first and second amplitudes.
摘要翻译： 提供了跨阻抗放大器，其产生具有与集成电路制造工艺兼容的简单，便宜的结构的低失真输出电压信号。 放大器包括当前处理器和互补输出级。 处理器响应于差分输入电流信号提供同相上和下电流信号，并响应于共模输入电流信号差分地改变这些信号的相应第一和第二幅度。 互补输出级具有上和下晶体管，其在对上和下电流信号的相应响应中提供输出电压信号，并且具有通过改变的第一和第二幅度减小的失真。
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公开(公告)号：US6060933A
公开(公告)日：2000-05-09
申请号：US112038
申请日：1998-07-08
申请人： Edward P. Jordan , Royal A. Gosser
发明人： Edward P. Jordan , Royal A. Gosser
CPC分类号： H03G1/0088
摘要： An electronic vernier realizes programmable gain steps with first and second impedance ladders, a plurality of activatable coupling networks and a switch network. The ladders receive and progressively process the differential input signal into a plurality of progressive differential signals. In an embodiment, the coupling networks each generate a respective one of a plurality of progressive differential output signals in response to a respective one of the progressive differential signals and the switch network activates any selected one of the coupling networks. Thus, any selected vernier step is obtained by activating the respective coupling network. The verniers can be integrated into various systems, e.g., programmable amplifiers.
摘要翻译： 电子游标器通过第一和第二阻抗梯子，多个可激活耦合网络和交换网络实现可编程增益步长。 梯子接收并逐渐处理差分输入信号为多个渐进差分信号。 在一个实施例中，耦合网络响应于相应的渐进差分信号之一而产生多个逐行差分输出信号中的相应一个，并且交换网络激活耦合网络中的任何一个。 因此，通过激活相应的耦合网络来获得任何选择的游标步骤。 游标可以集成到各种系统中，例如可编程放大器。
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公开(公告)号：US4970470A
公开(公告)日：1990-11-13
申请号：US419192
申请日：1989-10-10
申请人： Royal A. Gosser
发明人： Royal A. Gosser
CPC分类号： H03F3/3076
摘要： An integrated-circuit (IC) transimpedance amplifier having a successive series of DC-coupled balanced symmetrical amplifier stages with overall current feedback. The input stage includes a pair of series-connected NPN/PNP transistor with common emitters serving as the inverting input terminal. The second stage includes a cross-coupled transistor quad with the bases of the first quad pair coupled to the collectors of the first stage transistors. The inter-stage coupling circuit includes a series string of diodes connected between the collectors of the first stage transistor pair. The input stage transistor pair is identical to the transistor pairs of the second stage quad, and all of those transistors carry identical DC currents. An output stage amplifier is driven by a signal from the collectors of the first transistor pair of the second stage quad. The second transistor pair of the quad is coupled to the output stage through current mirrors to augment the output signal.
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