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公开(公告)号:US5668504A
公开(公告)日:1997-09-16
申请号:US678486
申请日:1996-07-09
IPC分类号: H04N7/26 , H03B25/00 , H03B27/00 , H03L7/081 , H03L7/099 , H03L7/16 , H03L7/183 , H03L7/197 , H03L7/06 , H03K5/00
CPC分类号: H03L7/16 , H03L7/081 , H03L7/0995 , H03L7/183 , H03B25/00 , H03B27/00 , H03L7/1976
摘要: A frequency synthesizer including a phase-locked loop, an oscillator of which supplies n phases with increasing delays of a fast clock signal synchronized on a reference frequency, each of said n phases being sent onto a same number m of fractional dividers having their respective outputs sent onto m jitter compensators which each issue, based on said n phases, a clock signal synchronized on said reference frequency.
摘要翻译: 一种频率合成器,包括锁相环,其振荡器为在参考频率上同步的快速时钟信号的增加的延迟提供n个相位,所述n个相位中的每一个被发送到具有它们各自的输出的相同数量的分数分频器 发送到m个抖动补偿器,每个抖动补偿器基于所述n个相位发出在所述参考频率上同步的时钟信号。