Multi-chip package semiconductor memory device
    1.
    发明授权
    Multi-chip package semiconductor memory device 有权
    多芯片封装半导体存储器件

    公开(公告)号:US09070482B2

    公开(公告)日:2015-06-30

    申请号:US13159517

    申请日:2011-06-14

    摘要: An MCP type semiconductor memory device having a defective cell remedy function, enables easy design and manufacture while minimizing chip area increase. The semiconductor memory device includes memory chips and a memory controller chip that designates an address of a memory chip according to an access request received from outside and controls access to the designated address. Each memory chip includes first and second storage regions and an information holder that holds address information representing associations between addresses in the first and second storage regions. The memory controller chip includes an address translating part that performs, upon receiving a request to access a specific address in the first storage region indicated by the address information, address designation by translating the specific address in the first storage region to an address in the second storage region corresponding to the specific address based on the associations represented by the address information.

    摘要翻译: 具有缺陷电池补救功能的MCP型半导体存储器件能够容易地进行设计和制造,同时最小化芯片面积增加。 半导体存储器件包括存储器芯片和存储器控制器芯片,其根据从外部接收的访问请求来指定存储器芯片的地址,并控制对指定地址的访问。 每个存储器芯片包括第一和第二存储区域以及信息保持器,其保存表示第一和第二存储区域中的地址之间的关联的地址信息。 存储器控制器芯片包括:地址转换部,其在接收到由地址信息指示的第一存储区域中访问特定地址的请求时,通过将第一存储区域中的特定地址转换为第二存储区域中的地址来执行地址指定 存储区域基于由地址信息表示的关联而与特定地址相对应。

    Multi-chip package semiconductor memory device
    2.
    发明授权
    Multi-chip package semiconductor memory device 有权
    多芯片封装半导体存储器件

    公开(公告)号:US08723303B2

    公开(公告)日:2014-05-13

    申请号:US13159513

    申请日:2011-06-14

    IPC分类号: H01L23/02 H01L23/48

    摘要: An MCP type semiconductor memory device having a structure in which a stack memory chip including a plurality of stacked memory chips and a memory controller chip are juxtaposed on a substrate, which achieves a reduction in package size. The semiconductor memory device includes a stack memory chip including a plurality of stacked memory chips, a substrate on which the stack memory chip is provided, and a memory controller chip adjacent the stack memory chip on the substrate. The stack memory chip is constructed such that an upper memory chip is stacked so as to shift toward a mounting position of the memory controller chip relative to a memory chip immediately below the upper memory chip. At least a part of the memory controller chip is received within a space between the substrate and a part of the stack memory chip that protrudes toward the memory controller chip.

    摘要翻译: 一种MCP型半导体存储器件,其结构是将包括多个堆叠的存储器芯片的堆叠存储器芯片和存储器控制器芯片并置在基板上,这实现了封装尺寸的减小。 半导体存储器件包括堆叠存储器芯片,其包括多个层叠的存储器芯片,其上提供有堆叠存储器芯片的衬底以及与衬底上的堆叠存储器芯片相邻的存储器控​​制器芯片。 堆叠存储器芯片被构造成使得上部存储器芯片被堆叠以便相对于位于上部存储器芯片正下方的存储器芯片朝向存储器控制器芯片的安装位置移动。 存储器控制器芯片的至少一部分被接收在衬底和向存储器控制器芯片突出的堆叠存储器芯片的一部分之间的空间内。

    Transmission apparatus and line quality evaluating method
    3.
    发明授权
    Transmission apparatus and line quality evaluating method 有权
    传输装置和线路质量评估方法

    公开(公告)号:US08363709B2

    公开(公告)日:2013-01-29

    申请号:US12625709

    申请日:2009-11-25

    IPC分类号: H04B17/00

    摘要: A transmission apparatus includes a test signal control unit that copies a test signal of a pseudo-random bit sequence and controls insertion of the same test signal in each member of a plurality of members of a concatenation signal, a concatenation signal transmitting unit that transmits each member of the concatenation signal with the test signal inserted therein by the test signal control unit to other apparatus via a plurality of transmission paths, a concatenation signal receiving unit that receives from the other apparatus each member of a plurality of members of a concatenation signal, and an individual-line-quality calculating unit that, using a test signal inserted in the members of the concatenation signal received by the concatenation signal receiving unit, individually evaluates each member of the concatenation signal received by the concatenation signal receiving unit and calculates a line quality of each transmission path.

    摘要翻译: 传输装置包括:测试信号控制单元,其复制伪随机比特序列的测试信号,并控制相同测试信号在级联信号的多个成员的每个成员中的插入;级联信号发送单元, 连接信号的成员,其中测试信号通过测试信号控制单元经由多个传输路径插入到其他设备中;级联信号接收单元,从其他设备接收串联信号的多个成员的每个成员, 以及单线质量计算单元,使用插入在级联信号接收单元接收的级联信号的成员中的测试信号,分别评估由级联信号接收单元接收的级联信号的每个成员,并计算一行 每个传输路径的质量。

    Frame transmitting apparatus and frame receiving apparatus
    4.
    发明授权
    Frame transmitting apparatus and frame receiving apparatus 有权
    帧发送装置和帧接收装置

    公开(公告)号:US08238348B2

    公开(公告)日:2012-08-07

    申请号:US11067291

    申请日:2005-02-28

    IPC分类号: H04L12/56 H04L12/28 H04J3/16

    CPC分类号: H04J3/1617

    摘要: A frame transmitting apparatus that transmits a frame via a synchronous digital hierarch network or a synchronous optical network, includes a data-amount detecting unit that detects an amount of data received from other apparatus; and a frame transmitting unit that transmits, when the amount of data detected by the data-amount detecting unit exceeds a predetermined threshold value, a frame in which information pertaining to a frame control is stored in a fixed stuff of a virtual container frame or a synchronous-transport-signal frame.

    摘要翻译: 经由同步数字分层网络或同步光网络发送帧的帧发送装置包括:数据量检测单元,检测从其他装置接收到的数据量; 以及帧发送单元,当由所述数据量检测单元检测到的数据量超过预定阈值时,将与帧控制有关的信息存储在虚拟容器框架或 同步传输信号帧。

    Image editing apparatus, method for controlling image editing apparatus, and recording medium storing image editing program
    5.
    发明授权
    Image editing apparatus, method for controlling image editing apparatus, and recording medium storing image editing program 有权
    图像编辑装置,图像编辑装置的控制方法以及存储图像编辑程序的记录介质

    公开(公告)号:US08224036B2

    公开(公告)日:2012-07-17

    申请号:US12120688

    申请日:2008-05-15

    IPC分类号: G06K9/00 G06F3/048

    摘要: An image editing apparatus includes an image input unit including an image pickup circuit which takes a picture of a subject to obtain an image of a subject. A face detection circuit detects an image of a face of the subject from the image obtained from the image input unit. A face expression detection circuit detects at least any one of direction and expression of the face of the subject, based on the image of the face detected by the face detection circuit. A pupil detection circuit detects images of pupils of the subject, based on the image of the face detected by the face detection circuit. A catch-light composition circuit composes different catch-lights on the images of the pupils detected by the pupil detection circuit, according to any one of the direction and expression of the face detected by the face expression detection circuit.

    摘要翻译: 图像编辑装置包括图像输入单元,该图像输入单元包括拍摄对象的图像以获得被摄体的图像的图像拾取电路。 面部检测电路根据从图像输入单元获得的图像检测被摄体的脸部的图像。 面部表情检测电路基于脸部检测电路检测到的脸部的图像,检测被检体的脸部的方向和表情中的至少任一个。 瞳孔检测电路根据面部检测电路检测到的脸部图像来检测对象的瞳孔的图像。 根据由面部表情检测电路检测到的面部的方向和表达中的任何一个,捕捉光组合电路在由瞳孔检测电路检测的瞳孔的图像上构成不同的捕获光。

    Image forming device for executing a designated process with priority without canceling a previously accepted process
    6.
    发明授权
    Image forming device for executing a designated process with priority without canceling a previously accepted process 有权
    用于在不取消先前接受的处理的情况下优先执行指定处理的图像形成装置

    公开(公告)号:US08189221B2

    公开(公告)日:2012-05-29

    申请号:US12078579

    申请日:2008-04-02

    IPC分类号: G06F15/00 G06F3/12 G06K1/00

    摘要: In an image forming device, when a priority of outputting input data determined by a priority determining unit is higher than a priority of in-process data during image expansion performed by one of PDL interpreter units, a PDL control unit determines whether the one of the PDL interpreter units supports an interruption process, and an output sequence changing unit changes an output sequence stored in an output sequence storing unit such that, when the one of the PDL interpreter units supports the interruption process, another of the PDL interpreter units performs image expansion of the input data earlier than the image expansion of the in-process data, and when the one of the PDL interpreter units does not support the interruption process, another of the PDL interpreter units performs the image expansion of the input data later than the image expansion of the in-process data.

    摘要翻译: 在图像形成装置中,当由优先级确定单元确定的输出数据的优先级高于由PDL解释器单元之一执行的图像展开期间的进行中数据的优先级时,PDL控制单元确定是否 PDL解释器单元支持中断处理,并且输出序列改变单元改变存储在输出序列存储单元中的输出序列,使得当PDL解释器单元之一支持中断处理时,另一个PDL解释器单元执行图像扩展 的输入数据早于进程数据的图像扩展,并且当PDL解释器单元之一不支持中断处理时,另一个PDL解释器单元执行比图像晚的输入数据的图像扩展 扩展进程内数据。

    Imaging device having manual and auto focus and a control method for the imaging device
    7.
    发明授权
    Imaging device having manual and auto focus and a control method for the imaging device 有权
    具有手动和自动对焦的成像装置和用于成像装置的控制方法

    公开(公告)号:US07978256B2

    公开(公告)日:2011-07-12

    申请号:US12193526

    申请日:2008-08-18

    IPC分类号: G03B13/20 H04N5/232

    CPC分类号: H04N5/23293 H04N5/23212

    摘要: An imaging device, comprising a photographing lens having a manual focus mechanism, an imaging unit for receiving subject light flux, that has been made incident by the photographing lens, on an imaging surface, a display unit for carrying out a live view display operation using image data acquired by the imaging unit, a contrast AF unit for obtaining contrast information of the subject information from image data acquired by the imaging unit and guiding the photographing lens into a specified focus permissible range based on the contrast information, and a control unit for, when a manual focus operation is carried out after executing a focus adjustment operation using the contrast AF unit during the live view display, carrying out control so that there is a transition to a shooting operation without again executing the focus adjustment operation.

    摘要翻译: 一种成像装置,包括具有手动对焦机构的摄影镜头,用于接收被拍摄镜头入射的被摄体光束的成像单元在成像表面上的显示单元,用于执行使用 由成像单元获取的图像数据,对比度AF单元,用于从由所述成像单元获取的图像数据获得所述对象信息的对比度信息,并且基于所述对比度信息将所述拍摄透镜引导到指定的焦点允许范围;以及控制单元, 当在实时取景显示期间执行使用对比度AF单元的聚焦调整操作之后执行手动对焦操作时,进行控制,使得转到拍摄操作而不再次执行聚焦调整操作。

    TRANSMISSION APPARATUS AND LINE QUALITY EVALUATING METHOD
    10.
    发明申请
    TRANSMISSION APPARATUS AND LINE QUALITY EVALUATING METHOD 有权
    传输设备和线路质量评估方法

    公开(公告)号:US20100208786A1

    公开(公告)日:2010-08-19

    申请号:US12625709

    申请日:2009-11-25

    IPC分类号: H04B17/00

    摘要: A transmission apparatus includes a test signal control unit that copies a test signal of a pseudo-random bit sequence and controls insertion of the same test signal in each member of a plurality of members of a concatenation signal, a concatenation signal transmitting unit that transmits each member of the concatenation signal with the test signal inserted therein by the test signal control unit to other apparatus via a plurality of transmission paths, a concatenation signal receiving unit that receives from the other apparatus each member of a plurality of members of a concatenation signal, and an individual-line-quality calculating unit that, using a test signal inserted in the members of the concatenation signal received by the concatenation signal receiving unit, individually evaluates each member of the concatenation signal received by the concatenation signal receiving unit and calculates a line quality of each transmission path.

    摘要翻译: 传输装置包括:测试信号控制单元,其复制伪随机比特序列的测试信号,并控制相同测试信号在级联信号的多个成员的每个成员中的插入;级联信号发送单元, 连接信号的成员,其中测试信号通过测试信号控制单元经由多个传输路径插入其他设备中;级联信号接收单元,从其他设备接收多个级联信号的成员的每个成员, 以及单线质量计算单元,使用插入在级联信号接收单元接收的级联信号的成员中的测试信号,分别评估由级联信号接收单元接收的级联信号的每个成员,并计算一行 每个传输路径的质量。