利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

8 条记录 (耗时 0.015 秒)

    Jagged edge compensator for staggered pixel layouts of a spatial light modulator
    1.
    发明授权
    Jagged edge compensator for staggered pixel layouts of a spatial light modulator 失效
    用于空间光调制器交错像素布局的锯齿边补偿器

    公开(公告)号：US5528296A

    公开(公告)日：1996-06-18

    申请号：US358056

    申请日：1994-12-16

    申请人： Robert J. Gove ,  Richard C. Meyer ,  John R. Reder ,  Scott D. Heimbuch

    发明人： Robert J. Gove ,  Richard C. Meyer ,  John R. Reder ,  Scott D. Heimbuch

    IPC分类号： H04N5/44 ,  H04N5/445 ,  H04N5/74 ,  H04N21/488 ,  G06K9/00 ,  H04N3/14

    CPC分类号： H04N21/4884 ,  H04N5/44513 ,  H04N5/7458 ,  H04N5/4401 ,  H04N5/445

    摘要： A graphics data unit (17) for a digital television receiver (10) that uses a spatial light modulator (16). The graphics data unit (17) has a graphics processor (22), which offloads graphics processing tasks, such as for closed captioning and on-screen display, from a main processor (14). The graphics data unit (17) also has a character memory (24), which stores fonts for closed caption and on-screen display characters. A read-only memory (22a) stores graphics primitives. The character fonts and the graphics primitives may be adapted to compensate for staggered pixel layouts of the spatial light modulator (16).

    摘要翻译： 一种用于使用空间光调制器（16）的数字电视接收机（10）的图形数据单元（17）。 图形数据单元（17）具有图形处理器（22），其从主处理器（14）卸载诸如用于隐藏字幕和屏幕显示的图形处理任务。 图形数据单元（17）还具有字符存储器（24），其存储用于隐藏字幕和屏幕显示字符的字体。 只读存储器（22a）存储图形基元。 字符字体和图形基元可以适于补偿空间光调制器（16）的交错像素布局。

    Video data formatter for a multi-channel digital television system without overlap
    4.
    发明授权
    Video data formatter for a multi-channel digital television system without overlap 失效
    用于多声道数字电视系统的视频数据格式化器，无重叠

    公开(公告)号：US5488431A

    公开(公告)日：1996-01-30

    申请号：US407788

    申请日：1995-03-20

    申请人： Robert J. Gove ,  Donald B. Doherty ,  Scott D. Heimbuch ,  Paul M. Urbanus ,  Stephen W. Marshall

    发明人： Robert J. Gove ,  Donald B. Doherty ,  Scott D. Heimbuch ,  Paul M. Urbanus ,  Stephen W. Marshall

    IPC分类号： H04N3/08 ,  H04N5/14 ,  H04N5/44 ,  H04N5/74 ,  H04N7/01 ,  H04N7/26 ,  H04N7/50 ,  H04N9/64 ,  H04N9/67 ,  H04N9/68 ,  H04N9/69 ,  H04N21/426 ,  H04N21/4402

    CPC分类号： H04N9/69 ,  H04N19/423 ,  H04N19/436 ,  H04N19/61 ,  H04N21/42638 ,  H04N21/4402 ,  H04N3/08 ,  H04N5/14 ,  H04N5/144 ,  H04N5/4401 ,  H04N5/7458 ,  H04N7/012 ,  H04N7/0135 ,  H04N9/3147 ,  H04N9/642 ,  H04N9/643 ,  H04N9/67 ,  H04N9/68 ,  H04N19/30 ,  H04N2005/7466

    摘要： A digital television system (10) System (10) may receive a video signal at composite video interface and separation circuit (16). The video signal is separated into component form by composite video interface and separation circuit (16). The component video signals are converted to digital component video signals in analog to digital converter circuit (18). Line slicer (14) divides each line of digital component video signal into a plurality of channels such that each channel may be processed in parallel by channel signal processors (22a) through (22d). Each channel signal processor (22a) through (22d) may provide two lines of output for each line of video input. The processed digital component video signals may be formatted for displays (26a) through (26c) in formatters (24a) through (24c). Each formatter (24a) through (24c) may comprise a plurality of first in-first out buffer memories (34a) through (34j). One of each channel signal processors (22a ) through (22d) may be coupled to two of first in-first out buffer memories (34a) through (34j). Additionally, each formatter (24a) through (24c) may comprise channel data format units (38a) through (38d), each associated with a channel of, for example, display (24a). Channel data format units (38a) through (38d) are coupled to appropriate of first in-first out buffer memories (34a) through (34j) via multiplexers (36a) through (36d). Each formatter (24a) through (24c) may remove overlap between channels of system (10) and may format the processed video signal into appropriate channels for displays (26a) through (26c).

    摘要翻译： 数字电视系统（10）系统（10）可以在复合视频接口和分离电路（16）处接收视频信号。 视频信号通过复合视频接口和分离电路（16）分离成组件形式。 分量视频信号在模数转换器电路（18）中被转换成数字分量视频信号。 线路限幅器（14）将数字分量视频信号的每一行分成多个通道，使得各信道可以被信道信号处理器（22a）至（22d）并行处理。 每个通道信号处理器（22a）到（22d）可以为每行视频输入提供两行输出。 经处理的数字分量视频信号可以格式化为格式化器（24a）到（24c）中的显示器（26a）至（26c）。 每个格式化器（24a）到（24c）可以包括多个先进先出缓冲存储器（34a）至（34j）。 每个通道信号处理器（22a）至（22d）中的一个可以耦合到两个先进先出的缓冲存储器（34a）至（34j）。 另外，每个格式器（24a）到（24c）可以包括通道数据格式单元（38a）到（38d），每个与例如显示器（24a）的通道相关联。 信道数据格式单元（38a）至（38d）通过多路复用器（36a）到（36d）耦合到适当的先进先出缓冲存储器（34a）至（34j）。 每个格式化器（24a）到（24c）可以去除系统（10）的通道之间的重叠，并且可以将经处理的视频信号格式化成用于显示器（26a）到（26c）的适当通道。

    Optimized electronic operation of digital micromirror devices
    5.
    发明授权
    Optimized electronic operation of digital micromirror devices 失效
    数字微镜器件的优化电子操作

    公开(公告)号：US5444566A

    公开(公告)日：1995-08-22

    申请号：US206812

    申请日：1994-03-07

    申请人： Richard O. Gale ,  Randall S. Lawson ,  Harlan P. Cleveland ,  Henry Chu ,  Carl W. Davis ,  Scott D. Heimbuch ,  Claude E. Tew

    发明人： Richard O. Gale ,  Randall S. Lawson ,  Harlan P. Cleveland ,  Henry Chu ,  Carl W. Davis ,  Scott D. Heimbuch ,  Claude E. Tew

    IPC分类号： G02B26/08

    CPC分类号： G02B26/0833 ,  G02B26/0841 ,  Y10S359/904

    摘要： A method for controlling a digital micromirror device 40 resulting in decreased mechanical stress, longer device lifetimes, decreased incidence of spontaneous bit reset, and increased pulse-width modulation accuracy. To reduce the device stress, the bias voltage 142 applied to the mirror 50 may be reduced after the mirror 50 has been latched. To prevent premature mirror changes, the address electrode bias voltage 140 may be reduced after the mirror is driven to the desired position. To ensure that the mirror 50 returns to the neutral position during reset, the mirror bias voltage 142 may be raised from ground potential to approximately halfway between the two addressing voltages during the reset period 152. To reduce the effects of hinge memory and to ensure that the mirror 50 rotates toward the proper address electrode, the mirror bias voltage 142 may be gradually increased to allow the mirror 50 time to rotate towards the proper address electrode.

    摘要翻译： 一种用于控制数字微镜器件40的方法，其导致机械应力降低，器件寿命延长，自发位复位的发生率降低，脉宽调制精度提高。 为了减小器件应力，在镜50被锁定之后，施加到反射镜50的偏置电压142可以减小。 为了防止过早的反射镜改变，在将反射镜驱动到所需位置之后，寻址电极偏置电压140可能会减小。 为了确保在复位期间反射镜50返回到中立位置，镜像偏置电压142可以在复位周期152期间从地电位升高到两个寻址电压之间的大约一半。为了减少铰链存储器的影响并确保 反射镜50朝向适当的寻址电极旋转，镜面偏置电压142可以逐渐增加，以允许反射镜50的时间朝着正确的寻址电极旋转。

    Spatial light modulator with superstructure light shield
    7.
    发明授权
    Spatial light modulator with superstructure light shield 失效
    具有上层结构的遮光罩的空间光调制器

    公开(公告)号：US5719695A

    公开(公告)日：1998-02-17

    申请号：US761022

    申请日：1996-12-05

    申请人： Scott D. Heimbuch

    发明人： Scott D. Heimbuch

    IPC分类号： G02B26/08 ,  G02B26/00

    CPC分类号： G02B26/0841

    摘要： A high contrast spatial light modulator (40) formed of micro-mechanical pixels (10). The supporting superstructure comprising the posts (12) and hinges (16) of the pixels (10) are shielded by an umbrella-like elevated light shield (42) extending over the hinge and posts. These light shields (42) are generally square in shape, and have edges arranged at approximately 45.degree. with respect to the incident light to minimize diffraction of light therefrom into projection optics. The upper surfaces of the shields may be anodized to achieve a non-reflective, black surface when viewed through darkfield optics. The shields (42) are fabricated using conventional semiconductor processes, which are a natural extension of the baseline process.

    摘要翻译： 由微机械像素（10）形成的高对比度空间光调制器（40）。 包括像素（10）的柱（12）和铰链（16）的支撑上部结构被在铰链和柱上延伸的伞状升高的遮光罩（42）屏蔽。 这些遮光罩（42）的形状大致为正方形，并且具有相对于入射光线约45°的边缘，以将来自其的光衍射最小化成投射光学元件。 当通过暗场光学器件观察时，屏蔽件的上表面可以被阳极化以实现非反射的黑色表面。 屏蔽（42）使用传统的半导体工艺制造，这是基线工艺的自然延伸。