摘要:
An apparatus and method for combined radio frequency identification (RFID)-based asset management and component authentication are provided. The apparatus comprises a plurality of components to be authenticated, a memory configured to store inventory data, a plurality of root-of-trust (RoT) integrated circuits (ICs), a wired communication bus, and a radio frequency identification (RFID) relay tag. Each RoT IC is mechanically coupled to a corresponding one of the plurality of components and configured to generate authentication data based on a unique key generated for authenticating the corresponding component. The RFID relay tag is connected to each of the RoT ICs via the wired communication bus and is configured to communicate with each of the RoT ICs via the wired communication bus and pass the authentication data and the inventory data to an RFID reader via a radio frequency signal to facilitate authentication of components and inventory management.
摘要:
A DC-DC voltage converter 40, which is adaptable to VHF operation, has a power oscillator 52 to which a filtered input DC voltage 50 is applied for conversion to an output DC voltage. The power oscillator includes a push-pull amplifier 58, 60 and an impedance transformation circuit 62 to which the amplifier is connected. The power oscillator also includes a rectifier circuit 64 which is connected to the impedance transformation circuit. A feedback circuit 68 controls the frequency of the oscillator to regulate the output DC voltage. The oscillator frequency depends on the impedance values of oscillator circuit components and the values of a plurality of oscillator component intrinsic parameters.
摘要:
Two discrete transmit/receive (T/R) channels are implemented in a single common T/R module package having the capability of providing combined functions, control and power conditioning while utilizing a single multi-cavity, multi-layer substrate comprised of high temperature cofired ceramic (HTCC) layers. The ceramic layers have outer surfaces including respective metallization patterns of ground planes and stripline conductors as well as feedthroughs or vertical vias formed therein for providing three dimensional routing of both shielded RF and DC power and logic control signals so as to configure, among other things, a pair of RF manifold signal couplers which are embedded in the substrate and which transition to a multi-pin blind mate press-on RF connector assembly at the front end of the package. DC and logic input/output control signals are connected to a plurality of active circuit components including application specific integrated circuits (ASICs) and monolithic microwave integrated circuit chips (MMICs) via spring contact pads at the rear of the package. The MMICs which generate substantially all of the heat are located in multi-level cavities formed in the substrate and are bonded directly to a generally flat a heat sink plate which is secured to the bottom of the substrate and acts as a thermal interface to an external heat exchanger such as a cold plate. DC power conditioning is also provided by a capacitive bank type of energy storage subassembly externally attached to the rear of the module package for supplying supplementary power to the module during peak power operation. The T/R module is one module of an array of like T/R modules coupled to an active aperture of a radar system.
摘要:
A T/R module including a multilevel, multichip microwave package having a plurality of gallium arsenide monolithic microwave integrated circuit chips (MMICs) implementing RF switching elements, a variable phase shifter, a plurality of RF amplifiers, and gain trim attenuators and which are located on a planar RF assembly. The module's architecture includes shared or common MMIC circuit elements during both transmit and receive operation modes thus reducing the number of MMICs required while at the same time preloading the supply voltage regulator-modulator which supplies DC power to all the MMIC circuits without degrading T/R module efficiency.
摘要:
A T/R module including a multilevel, multichip microwave package having a plurality of gallium arsenide monolithic microwave integrated circuit chips (MMICs) implementing RF switching elements, a variable phase shifter, a plurality of RF amplifiers, and gain trim attenuators and which are located on a planar RF assembly. The module's architecture includes shared or common MMIC circuit elements during both transmit and receive operation modes thus reducing the number of MMICs required while at the same time preloading the supply voltage regulator-modulator which supplies DC power to all the MMIC circuits without degrading T/R module efficiency.
摘要翻译:AT / R模块包括具有实现RF开关元件的多个砷化镓单片微波集成电路芯片(MMIC)的多电平多芯片微波封装,可变移相器,多个RF放大器和增益调整衰减器,并且位于 平面RF组件。 该模块的架构包括发射和接收操作模式下的共享或公共MMIC电路元件,从而减少所需的MMIC数量,同时预加载供应电压调节器调制器,其向所有MMIC电路提供直流电而不降低T / R 模块效率。
摘要:
An apparatus and method for combined radio frequency identification (RFID)-based asset management and component authentication are provided. The apparatus comprises a plurality of components to be authenticated, a memory configured to store inventory data, a plurality of root-of-trust (RoT) integrated circuits (ICs), a wired communication bus, and a radio frequency identification (RFID) relay tag. Each RoT IC is mechanically coupled to a corresponding one of the plurality of components and configured to generate authentication data based on a unique key generated for authenticating the corresponding component. The RFID relay tag is connected to each of the RoT ICs via the wired communication bus and is configured to communicate with each of the RoT ICs via the wired communication bus and pass the authentication data and the inventory data to an RFID reader via a radio frequency signal to facilitate authentication of components and inventory management.
摘要:
A radio frequency semiconductor switching device (S) is formed on an MMIC structure (C) including a switching circuit element (12) having four semiconductor switching units (68, 70) with each adapted for receiving a gate control signal. A level shift circuit (10) generates a biasing voltage signal communicated of the switching units (68, 70) for biasing the switching units (68), and provides an output that swings between approximately one diode drop above ground and a negative voltage to bias the switching circuit elements (68 and 70) for reduced loss. The level shift circuit (10) is responsive to an externally provided control signal (58). The switching units (68, 70) are formed into a grouping of at least, a first and a second set (76, 78) of interconnected semiconductor switching units (68, 70) with each set (76, 78) having gates of at least two of the interconnected switching units (68, 70) connected with the level shift circuit output (60, 62). Both the switching units (68, 70) and the level shift circuit (10) are formed on the MMIC structure (C).
摘要:
Two discrete transmit/receive (T/R) channels are implemented in a single common T/R module package having the capability of providing combined functions, control and power conditioning while utilizing a single multi-cavity, multi-layer substrate comprised of high or low temperature cofired ceramic layers. The ceramic layers have outer surfaces including respective metallization patterns of ground planes and stripline conductors as well as feedthroughs or vertical vias formed therein for providing three dimensional routing of both shielded RF and DC power and logic control signals so as to configure, among other things, a pair of RF manifold signal couplers which are embedded in the substrate and which transition to a multi-pin blind mate press-on RF connector assembly at the front end of the package. DC and logic input/output control signals are connected to a plurality of active circuit components including application specific integrated circuits (ASICs) and monolithic microwave integrated circuit chips (MMICs) via spring contact pads at the rear of the package. An RF connector assembly for coupling transmit and receive signals to and from the module is located at the front of the package. The RF transmit power amplifiers which generate most of the heat in the module package are located in a first pair of cavities formed in the substrate directly behind the RF connector assembly and are mounted directly on a pair of flat heat sink plates which are secured to the bottom of the substrate and acts as a thermal interface to an external heat exchanger such as a cold plate. A second pair of cavities in which are located the RF receive signal amplifiers and their respective receiver protector elements, is located beside the first pair of cavities directly behind the RF connector for reducing RF signal loss.
摘要:
A transmit/receive (T/R) module adapted for use in a radar system. The module has a unified structure including a layered substrate on and in which two T/R channel circuits are integrated. The channel circuits make use of power distribution, channel controller, and RF signal routing circuitry, partly on a channel shared basis. In the RF routing circuitry, respective coupler elements are employed to combine RF receive signals for output to an RF receive manifold and to split an RF transmit signal from a transmit manifold into separate RF transmit signals for input to the T/R channel circuits.
摘要:
A radio frequency semiconductor switching device (S) is formed on an MMIC structure (C) including a switching circuit element (12) having four semiconductor switching units (68, 70) with each adapted for receiving a gate control signal. A level shift circuit (10) generates a biasing voltage signal communicated of the switching units (68, 70) for biasing the switching units (68), and provides an output that swings between approximately one diode drop above ground and a negative voltage to bias the switching circuit elements (68 and 70) for reduced loss. The level shift circuit (10) is responsive to an externally provided control signal (58). The switching units (68, 70) are formed into a grouping of at least, a first and a second set (76, 78) of interconnected semiconductor switching units (68, 70) with each set (76, 78) having gates of at least two of the interconnected switching units (68, 70) connected with the level shift circuit output (60, 62). Both the switching units (68, 70) and the level shift circuit (10) are formed on the MMIC structure (C).