公开(公告)号：US09502406B1

公开(公告)日：2016-11-22

申请号：US14838999

申请日：2015-08-28

申请人： Cheolwoo Park ,  Kwangyul Lee ,  Jeongeon Lee ,  Seokjun Won ,  Hyungsuk Jung

发明人： Cheolwoo Park ,  Kwangyul Lee ,  Jeongeon Lee ,  Seokjun Won ,  Hyungsuk Jung

IPC分类号： H01L27/088 ,  H01L29/49 ,  H01L29/51 ,  H01L29/66

CPC分类号： H01L27/088 ,  H01L21/02063 ,  H01L21/28114 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/823456 ,  H01L21/823462 ,  H01L29/42376 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/66575

摘要： Provided is a semiconductor device and method of fabricating the same. The device includes a substrate including a first region and a second region, a first gate pattern on the first region, a second gate pattern on the second region, and an interlayer insulating layer enclosing the first and second gate patterns. The first gate pattern including a first gate insulating layer and a first gate electrode, the second gate pattern including a second gate insulating layer and a second gate electrode, the first gate insulating layer is thicker than the second gate insulating layer, and a top width of the second gate pattern is larger than a bottom width thereof.

公开(公告)号：US20080246148A1

公开(公告)日：2008-10-09

申请号：US11972192

申请日：2008-01-10

申请人： Seokjun Won ,  Hokyu Kang

发明人： Seokjun Won ,  Hokyu Kang

IPC分类号： H01L23/52

CPC分类号： H01L23/53238 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/76852 ,  H01L21/76879 ,  H01L21/76885 ,  H01L23/53276 ,  H01L2221/1094 ,  H01L2924/0002 ,  H01L2924/00

摘要： Integrated circuit devices include electrically conductive interconnects containing carbon nanotubes. An electrical interconnect includes a first metal region. A first electrically conductive barrier layer is provided on an upper surface of the first metal region and a second metal region is provided on the first electrically conductive barrier layer. The first electrically conductive barrier layer includes a material that inhibits out-diffusion of the first metal from the first metal region and the second metal region includes a catalytic metal therein. An electrically insulating layer having an opening therein is provided on the second metal region. A plurality of carbon nanotubes are provided as a vertical electrical interconnect in the opening.

摘要翻译： 集成电路器件包括含有碳纳米管的导电互连。 电互连包括第一金属区域。 第一导电阻挡层设置在第一金属区域的上表面上，第二金属区域设置在第一导电阻挡层上。 第一导电阻挡层包括抑制第一金属从第一金属区域的扩散扩散的材料，第二金属区域包括催化金属。 其中具有开口的电绝缘层设置在第二金属区域上。 在开口中设置多个碳纳米管作为垂直电互连。