ASYMMETRIC SOURCE/DRAIN JUNCTIONS FOR LOW POWER SILICON ON INSULATOR DEVICES
    2.
    发明申请
    ASYMMETRIC SOURCE/DRAIN JUNCTIONS FOR LOW POWER SILICON ON INSULATOR DEVICES 有权
    用于绝缘子器件上的低功率硅的不对称源/漏极连接

    公开(公告)号:US20110180852A1

    公开(公告)日:2011-07-28

    申请号:US13078476

    申请日:2011-04-01

    IPC分类号: H01L29/772

    摘要: A semiconductor device includes a buried insulator layer formed on a bulk substrate; a first type semiconductor material formed on the buried insulator layer, and corresponding to a body region of a field effect transistor (FET); a second type of semiconductor material formed over the buried insulator layer, adjacent opposing sides of the body region, and corresponding to source and drain regions of the FET; the second type of semiconductor material having a different bandgap than the first type of semiconductor material; wherein a source side p/n junction of the FET is located substantially within whichever of the first and the second type of semiconductor material having a lower bandgap, and a drain side p/n junction of the FET is located substantially entirely within whichever of the first and the second type of semiconductor material having a higher bandgap.

    摘要翻译: 半导体器件包括形成在本体衬底上的掩埋绝缘体层; 形成在所述掩埋绝缘体层上并对应于场效应晶体管(FET)的体区的第一类型半导体材料; 形成在所述掩埋绝缘体层上,邻近所述本体区域的相对侧并且对应于所述FET的源极和漏极区域的第二类型的半导体材料; 所述第二类型的半导体材料具有与所述第一类型的半导体材料不同的带隙; 其中FET的源极p / n结基本上位于具有较低带隙的第一和第二类型的半导体材料中的任何一个中,并且FET的漏极侧p / n结基本上完全位于 第一和第二类型的具有较高带隙的半导体材料。

    Real-time wireless sensor network protocol having linear configuration
    3.
    发明授权
    Real-time wireless sensor network protocol having linear configuration 有权
    具有线性配置的实时无线传感器网络协议

    公开(公告)号:US07885251B2

    公开(公告)日:2011-02-08

    申请号:US11316712

    申请日:2005-12-27

    IPC分类号: H04J3/06

    摘要: A network configuration method of a sensor network configured to collect sensed data from a plurality of sensor nodes comprising: arranging linearly a path of respective node so as to enable all sensor nodes except for a sink node and a terminal node to have respectively a predecessor and a successor; and setting the time synchronization of whole network by fixing the each node take its own time synchronization on the basis of an operation section of the predecessor.

    摘要翻译: 传感器网络的网络配置方法,其被配置为从多个传感器节点收集感测数据,包括:线性地布置各个节点的路径,以便能够使得除了节点和终端节点之外的所有传感器节点分别具有前导和 继任者 并且通过固定每个节点在前一个操作部分的基础上进行自己的时间同步来设置整个网络的时间同步。

    Transmitter and transmitting method thereof in wireless communication system
    4.
    发明授权
    Transmitter and transmitting method thereof in wireless communication system 有权
    无线通信系统中的发射机及其发射方法

    公开(公告)号:US07796958B2

    公开(公告)日:2010-09-14

    申请号:US11847763

    申请日:2007-08-30

    IPC分类号: H04B1/02 H04B1/04 H04L27/00

    CPC分类号: H04B1/0483

    摘要: A transmitter and a transmitting method of a wireless communication system are provided. The transmitter transmits RF signals using an outphasing scheme of converting one analog IF NC-EMS into two analog C-EMSs. In the transmitter, a baseband processor generates a baseband digital modulated I-signal and a baseband digital modulated Q-signal. A signal converter converts the baseband digital modulated I-signal and the baseband digital modulated Q-signal into a baseband analog modulated I-signal and a baseband analog modulated Q-signal. An IF processor up-converts the baseband analog modulated I-signal and the baseband analog modulated Q-signal to generate one analog IF NC-EMS. A signal component separator separates the analog IF NC-EMS into a first analog IF C-EMS and a second analog IF C-EMS. An RF processor up-converts the first analog IF C-EMS and the second analog IF C-EMS to generate a first analog RF C-EMS and a second analog RF C-EMS. A power amplifier amplifies powers of the first and second analog RF C-EMSs. An RF combiner combines the first and second analog RF C-EMSs having the amplified powers to generate one combined analog RF C-EMS.

    摘要翻译: 提供了一种无线通信系统的发射机和发射方法。 发射机使用将一个模拟IF NC-EMS转换成两个模拟C-EMS的外部方案来发射RF信号。 在发射机中,基带处理器产生基带数字调制I信号和基带数字调制Q信号。 信号转换器将基带数字调制I信号和基带数字调制Q信号转换成基带模拟调制I信号和基带模拟调制Q信号。 IF处理器对基带模拟调制信号和基带模拟调制Q信号进行升压转换,以生成一个模拟IF NC-EMS。 信号分量分离器将模拟IF NC-EMS分为第一模拟IF C-EMS和第二模拟IF C-EMS。 RF处理器将第一个模拟IF C-EMS和第二个模拟IF C-EMS升级转换,生成第一个模拟RF C-EMS和第二个模拟RF C-EMS。 功率放大器放大第一和第二模拟RF C-EMS的功率。 RF组合器组合具有放大功率的第一和第二模拟RF C-EMS以产生一个组合的模拟RF C-EMS。

    Transmitter and Transmitting Method Thereof In Wireless Communication System
    5.
    发明申请
    Transmitter and Transmitting Method Thereof In Wireless Communication System 有权
    无线通信系统中的发射机和发射方法

    公开(公告)号:US20090054014A1

    公开(公告)日:2009-02-26

    申请号:US11847795

    申请日:2007-08-30

    IPC分类号: H03C7/02

    摘要: A transmitter and a transmitting method of a wireless communication system are provided. The transmitter transmits RF signals using an outphasing scheme of converting one analog IF NC-EMS into two analog C-EMSs. In the transmitter, a baseband processor generates a baseband digital modulated I-signal and a baseband digital modulated Q-signal. An IF processor up-converts the baseband digital modulated I-signal and the baseband digital modulated Q-signal to generate one digital IF NC-EMS. A signal component separator separates the digital IF NC-EMS into a first digital IF C-EMS and a second digital IF C-EMS. An RF processor up-converts the first digital IF C-EMS and the second digital IF C-EMS to generate a first analog RF C-EMS and a second analog RF C-EMS. A power amplifier amplifies powers of the first and second analog RF C-EMSs. An RF combiner combines the first and second analog RF C-EMSs having the amplified powers to generate one combined analog RF C-EMS.

    摘要翻译: 提供了一种无线通信系统的发射机和发射方法。 发射机使用将一个模拟IF NC-EMS转换成两个模拟C-EMS的外部方案来发射RF信号。 在发射机中,基带处理器产生基带数字调制I信号和基带数字调制Q信号。 IF处理器对基带数字调制I信号和基带数字调制Q信号进行升级转换,以生成一个数字IF NC-EMS。 信号分量分离器将数字IF NC-EMS分离成第一数字IF C-EMS和第二数字IF C-EMS。 RF处理器对第一个数字IF C-EMS和第二个数字IF C-EMS进行升级转换,以生成第一个模拟RF C-EMS和第二个模拟RF C-EMS。 功率放大器放大第一和第二模拟RF C-EMS的功率。 RF组合器组合具有放大功率的第一和第二模拟RF C-EMS以产生一个组合的模拟RF C-EMS。

    Semiconductor structure and method of manufacture
    7.
    发明授权
    Semiconductor structure and method of manufacture 有权
    半导体结构及制造方法

    公开(公告)号:US07329940B2

    公开(公告)日:2008-02-12

    申请号:US11163882

    申请日:2005-11-02

    IPC分类号: H01L27/082

    摘要: A structure comprises a single wafer with a first subcollector formed in a first region having a first thickness and a second subcollector formed in a second region having a second thickness, different from the first thickness. A method is also contemplated which includes providing a substrate including a first layer and forming a first doped region in the first layer. The method further includes forming a second layer on the first layer and forming a second doped region in the second layer. The second doped region is formed at a different depth than the first doped region. The method also includes forming a first reachthrough in the first layer and forming a second reachthrough in second layer to link the first reachthrough to the surface.

    摘要翻译: 一种结构包括具有形成在具有第一厚度的第一区域中的第一子集电极的单晶片和形成在具有不同于第一厚度的第二厚度的第二区域中的第二子集电极。 还可以设想一种方法,其包括提供包括第一层并在第一层中形成第一掺杂区的衬底。 该方法还包括在第一层上形成第二层并在第二层中形成第二掺杂区域。 第二掺杂区形成在与第一掺杂区不同的深度。 该方法还包括在第一层中形成第一通道并在第二层中形成第二通道以将第一通道连接到表面。

    Hardwired scheduler for low power wireless device processor and method for using the same
    8.
    发明申请
    Hardwired scheduler for low power wireless device processor and method for using the same 审中-公开
    用于低功耗无线设备处理器的硬连线调度器及其使用方法

    公开(公告)号:US20070157207A1

    公开(公告)日:2007-07-05

    申请号:US11474417

    申请日:2006-06-26

    IPC分类号: G06F9/46

    摘要: The present invention relates to a hardwired scheduler for low power wireless device processor and a method for using the same wherein, for a processor used in a sensor node, ubiquitous small node and a wireless communication device which require a low power consumption, a storage of the currently running process and the process to be executed in priority in a list of subsequent processes to be carried out are automatically transmitted to the processor core, and the number of oscillations of the clock generator which operates the processor core is adjusted to be suitable for each process to reduce the power consumed by the processor to be applicable to devices operating on a network which require a low power consumption and small delay time.

    摘要翻译: 本发明涉及一种用于低功率无线设备处理器的硬接线调度器及其使用方法,其中,对于在传感器节点中使用的处理器,普遍存在的小节点和需要低功耗的无线通信设备,存储 当前运行的处理和要执行的后续处理的列表中优先执行的处理被自动发送到处理器核心,并且调整操作处理器核心的时钟发生器的振荡次数以适合于 每个过程减少处理器消耗的功率,以适用于需要低功耗和小延迟时间的网络上运行的设备。

    Method for manufacturing lateral bipolar mode field effect transistor
    9.
    发明授权
    Method for manufacturing lateral bipolar mode field effect transistor 有权
    制造横向双极型场效应晶体管的方法

    公开(公告)号:US06358786B1

    公开(公告)日:2002-03-19

    申请号:US09591965

    申请日:2000-06-12

    申请人: Seong Dong Kim

    发明人: Seong Dong Kim

    IPC分类号: H01L21337

    CPC分类号: H01L29/739

    摘要: A lateral bipolar field effect transistor having a drift region of a first conductivity formed on a silicon-on insulation substrate with a buried insulation layer, a gate region of a second conductivity formed over and from the buried insulation layer separated by a channel depth, in the drift region, a source region of the first conductivity contacting with the gate region and formed on the buried insulation layer, and a drain region of the first conductivity opposite to the source region, the drain region separated from the gate region by a selected distance. The gate region comprises a plurality of cells arranged parallel to an extension of the source region, each cell separated from adjacent cell by a channel width.

    摘要翻译: 一种横向双极场效应晶体管,其具有形成在具有掩埋绝缘层的硅绝缘基底上的第一导电性的漂移区,形成在由沟道深度分开的掩埋绝缘层上方的第二导电的栅极区, 所述漂移区域,与所述栅极区域接触并形成在所述掩埋绝缘层上的所述第一导电性的源极区域和与所述源极区域相反的所述第一导电性的漏极区域,所述漏极区域与所述栅极区域分开一定距离 。 栅极区域包括与源极区域的延伸平行布置的多个单元,每个单元通过沟道宽度与相邻单元格分离。

    Asymmetric source/drain junctions for low power silicon on insulator devices
    10.
    发明授权
    Asymmetric source/drain junctions for low power silicon on insulator devices 有权
    低功率硅绝缘体器件的不对称源极/漏极结

    公开(公告)号:US07977178B2

    公开(公告)日:2011-07-12

    申请号:US12395904

    申请日:2009-03-02

    IPC分类号: H01L21/336 H01L21/8234

    摘要: A semiconductor device includes a buried insulator layer formed on a bulk substrate; a first type semiconductor material formed on the buried insulator layer, and corresponding to a body region of a field effect transistor (FET); a second type of semiconductor material formed over the buried insulator layer, adjacent opposing sides of the body region, and corresponding to source and drain regions of the FET; the second type of semiconductor material having a different bandgap than the first type of semiconductor material; wherein a source side p/n junction of the FET is located substantially within whichever of the first and the second type of semiconductor material having a lower bandgap, and a drain side p/n junction of the FET is located substantially entirely within whichever of the first and the second type of semiconductor material having a higher bandgap.

    摘要翻译: 半导体器件包括形成在本体衬底上的掩埋绝缘体层; 形成在所述掩埋绝缘体层上并对应于场效应晶体管(FET)的体区的第一类型半导体材料; 形成在所述掩埋绝缘体层上,邻近所述本体区域的相对侧并且对应于所述FET的源极和漏极区域的第二类型的半导体材料; 所述第二类型的半导体材料具有与所述第一类型的半导体材料不同的带隙; 其中FET的源极p / n结基本上位于具有较低带隙的第一和第二类型的半导体材料中的任何一个中,并且FET的漏极侧p / n结基本上完全位于 第一和第二类型的具有较高带隙的半导体材料。