COMPRESSION CHAMBER FOR COMPRESSION TYPE RAMEN COOKER

    公开(公告)号:US20230190029A1

    公开(公告)日:2023-06-22

    申请号:US17927255

    申请日:2020-09-04

    摘要: A compression chamber for a compression type ramen cooker is capable of cooking ramen by compression by blocking a discharge of air in a cooking container while cooking ramen. The compression chamber includes a lid, a chamber container having an upper portion on which the lid is mounted and a bottom surface to which the cooking container is coupled to seal the cooking container, a heater installed through the lid and mounted inside the chamber container to heat the water stored in the chamber container, a supply valve unit installed through the lid to supply water to the inside of the chamber container, a discharge valve unit installed through the lid to supply water in the chamber container to the cooking container, and a vapor discharge unit on a lower side of the chamber container to discharge compressed steam inside the cooking container.

    COMPRESSION TYPE RAMEN COOKER USING INDUCTION HEATER

    公开(公告)号:US20230137572A1

    公开(公告)日:2023-05-04

    申请号:US17927207

    申请日:2020-09-04

    摘要: A compression type ramen cooker according to an embodiment includes a main frame including side plates formed on both sides thereof, an upper main bar connecting the upper portions of the side plates, and a lower main bar connecting the lower portions of the side plates, a cooking vessel part rotatably mounted on the inner sides of the side plates, a compression chamber mounted above the upper main bar to seal or open the cooking vessel part by moving up and down, an induction heater rotatably mounted on the rear side of the cooking vessel part to heat the cooking vessel part, a ramen discharging part for discharging cooked ramen from the cooking vessel part, and a drain mounted in the lower end of the side plates on both sides to discard the water used for cleaning the cooking vessel part after cooking.

    Method of manufacturing a CMOS image sensor
    4.
    发明授权
    Method of manufacturing a CMOS image sensor 失效
    CMOS图像传感器的制造方法

    公开(公告)号:US08043927B2

    公开(公告)日:2011-10-25

    申请号:US12457773

    申请日:2009-06-22

    IPC分类号: H01L21/76

    摘要: In a method of manufacturing a complementary metal-oxide semiconductor (CMOS) image sensor (CIS), an epitaxial layer may be formed on a first substrate including a chip area and a scribe lane area. A first impurity layer may be formed adjacent to the first substrate by implanting first impurities into the epitaxial layer. A photodiode may be formed in the epitaxial layer on the chip area. A circuit element electrically connected to the photodiode may be formed on the epitaxial layer. A protective layer protecting the circuit element may be formed on the epitaxial layer. A second substrate may be attached onto the protective layer. The first substrate may be removed to expose the epitaxial layer. A color filter layer may be formed on the exposed epitaxial layer using the first impurity layer as an alignment key. A microlens may be formed over the color filter layer.

    摘要翻译: 在制造互补金属氧化物半导体(CMOS)图像传感器(CIS)的方法中,可以在包括芯片区域和划线区域的第一基板上形成外延层。 可以通过将第一杂质注入到外延层中而与第一衬底相邻地形成第一杂质层。 可以在芯片区域上的外延层中形成光电二极管。 电连接到光电二极管的电路元件可以形成在外延层上。 可以在外延层上形成保护电路元件的保护层。 第二基底可以附着在保护层上。 可以去除第一衬底以暴露外延层。 可以使用第一杂质层作为对准键,在暴露的外延层上形成滤色器层。 可以在滤色器层上形成微透镜。

    Fabrication of image sensor with improved signal to noise ratio
    5.
    发明申请
    Fabrication of image sensor with improved signal to noise ratio 有权
    具有提高信噪比的图像传感器制造

    公开(公告)号:US20100227429A1

    公开(公告)日:2010-09-09

    申请号:US12454818

    申请日:2009-05-22

    IPC分类号: H01L21/02

    摘要: For fabricating an image sensor, an isolation structure is formed to define a first active region of a semiconductor substrate. A first transistor and a second transistor of a unit pixel are formed in the first active region. In addition, a threshold voltage lowering region is formed in a portion of the semiconductor substrate near a portion of the isolation structure abutting the second transistor in the first active region. The threshold voltage lowering region causes the second transistor to have a respective threshold voltage magnitude that is lower than for the first transistor. The threshold voltage lowering region is formed simultaneously with a passivation region in a second active region having a photodiode formed therein.

    摘要翻译: 为了制造图像传感器,形成隔离结构以限定半导体衬底的第一有源区。 在第一有源区中形成单位像素的第一晶体管和第二晶体管。 此外,在靠近第一有源区域中的第二晶体管的隔离结构的一部分附近,在半导体衬底的一部分中形成阈值电压降低区域。 阈值电压降低区域使得第二晶体管具有比第一晶体管低的相应阈值电压幅值。 阈值电压降低区域与其中形成有光电二极管的第二有源区域中的钝化区域同时形成。

    Image sensors including impurity layer adjacent isolation region
    6.
    发明授权
    Image sensors including impurity layer adjacent isolation region 有权
    图像传感器包括杂质层相邻的隔离区域

    公开(公告)号:US07586170B2

    公开(公告)日:2009-09-08

    申请号:US11668016

    申请日:2007-01-29

    IPC分类号: H01L31/00 H01L31/062

    摘要: Image sensors include a pixel region and a logic region. Pixel isolation regions in the pixel region include pixel isolation region walls that are less sloped than logic isolation region walls in the logic region. An impurity layer also may be provided adjacent at least some of the pixel isolation region walls, wherein at least some of the logic isolation region walls are free of the impurity layer. The impurity layer and/or the less sloped logic isolation region walls may also be provided for NMOS devices in the logic region but not for PMOS devices in the logic region. Doped sacrificial layers may be used to fabricate the impurity layer.

    摘要翻译: 图像传感器包括像素区域和逻辑区域。 像素区域中的像素隔离区域包括比逻辑区域中的逻辑隔离区域壁更少倾斜的像素隔离区域壁。 也可以在至少一些像素隔离区域壁附近提供杂质层,其中至少一些逻辑隔离区域壁不含杂质层。 也可以为逻辑区域中的NMOS器件提供杂质层和/或较小倾斜的逻辑隔离区域壁,但不提供给逻辑区域中的PMOS器件。 可以使用掺杂的牺牲层来制造杂质层。

    Compression type ramen cooker using induction heater

    公开(公告)号:US11871864B2

    公开(公告)日:2024-01-16

    申请号:US17927207

    申请日:2020-09-04

    摘要: A compression type ramen cooker according to an embodiment includes a main frame including side plates formed on both sides thereof, an upper main bar connecting the upper portions of the side plates, and a lower main bar connecting the lower portions of the side plates, a cooking vessel part rotatably mounted on the inner sides of the side plates, a compression chamber mounted above the upper main bar to seal or open the cooking vessel part by moving up and down, an induction heater rotatably mounted on the rear side of the cooking vessel part to heat the cooking vessel part, a ramen discharging part for discharging cooked ramen from the cooking vessel part, and a drain mounted in the lower end of the side plates on both sides to discard the water used for cleaning the cooking vessel part after cooking.

    Image device and method of fabricating the same
    8.
    发明授权
    Image device and method of fabricating the same 失效
    图像装置及其制造方法

    公开(公告)号:US07884400B2

    公开(公告)日:2011-02-08

    申请号:US12014294

    申请日:2008-01-15

    申请人: Seung-hun Shin

    发明人: Seung-hun Shin

    IPC分类号: H01L31/00

    CPC分类号: H01L27/14636

    摘要: An image device and a method of fabricating the image device include a substrate pattern formed to define an opening and to include a portion of a photodiode for receiving light. Stacked metal interconnection patterns and an interlayer dielectric layer are formed beneath the substrate pattern. A height of the opening equals a height of the substrate pattern, such that an exposed portion of a top surface of the interlayer dielectric layer provides a bottom surface of the opening. An external connection electrode is positioned on the bottom surface of the opening.

    摘要翻译: 图像装置和制造图像装置的方法包括形成为限定开口并且包括用于接收光的光电二极管的一部分的基板图案。 堆叠的金属互连图案和层间电介质层形成在衬底图案下方。 开口的高度等于衬底图案的高度,使得层间电介质层的顶表面的暴露部分提供开口的底表面。 外部连接电极位于开口的底表面上。

    METHODS OF FABRICATING IMAGE SENSORS INCLUDING IMPURITY LAYER ISOLATION REGIONS
    9.
    发明申请
    METHODS OF FABRICATING IMAGE SENSORS INCLUDING IMPURITY LAYER ISOLATION REGIONS 有权
    制造图像传感器的方法,包括沉积层分离区域

    公开(公告)号:US20100015747A1

    公开(公告)日:2010-01-21

    申请号:US12512779

    申请日:2009-07-30

    IPC分类号: H01L31/18

    摘要: Image sensors include a pixel region and a logic region. Pixel isolation regions in the pixel region include pixel isolation region walls that are less sloped than logic isolation region walls in the logic region. An impurity layer also may be provided adjacent at least some of the pixel isolation region walls, wherein at least some of the logic isolation region walls are free of the impurity layer. The impurity layer and/or the less sloped logic isolation region walls may also be provided for NMOS devices in the logic region but not for PMOS devices in the logic region. Doped sacrificial layers may be used to fabricate the impurity layer.

    摘要翻译: 图像传感器包括像素区域和逻辑区域。 像素区域中的像素隔离区域包括比逻辑区域中的逻辑隔离区域壁更少倾斜的像素隔离区域壁。 也可以在至少一些像素隔离区域壁附近提供杂质层,其中至少一些逻辑隔离区域壁不含杂质层。 也可以为逻辑区域中的NMOS器件提供杂质层和/或较小倾斜的逻辑隔离区域壁,但不提供给逻辑区域中的PMOS器件。 可以使用掺杂的牺牲层来制造杂质层。

    Method of manufacturing a CMOS image sensor
    10.
    发明申请
    Method of manufacturing a CMOS image sensor 失效
    CMOS图像传感器的制造方法

    公开(公告)号:US20090317933A1

    公开(公告)日:2009-12-24

    申请号:US12457773

    申请日:2009-06-22

    IPC分类号: H01L31/0232

    摘要: In a method of manufacturing a complementary metal-oxide semiconductor (CMOS) image sensor (CIS), an epitaxial layer may be formed on a first substrate including a chip area and a scribe lane area. A first impurity layer may be formed adjacent to the first substrate by implanting first impurities into the epitaxial layer. A photodiode may be formed in the epitaxial layer on the chip area. A circuit element electrically connected to the photodiode may be formed on the epitaxial layer. A protective layer protecting the circuit element may be formed on the epitaxial layer. A second substrate may be attached onto the protective layer. The first substrate may be removed to expose the epitaxial layer. A color filter layer may be formed on the exposed epitaxial layer using the first impurity layer as an alignment key. A microlens may be formed over the color filter layer.

    摘要翻译: 在制造互补金属氧化物半导体(CMOS)图像传感器(CIS)的方法中,可以在包括芯片区域和划线区域的第一基板上形成外延层。 可以通过将第一杂质注入到外延层中而与第一衬底相邻地形成第一杂质层。 可以在芯片区域上的外延层中形成光电二极管。 电连接到光电二极管的电路元件可以形成在外延层上。 可以在外延层上形成保护电路元件的保护层。 第二基底可以附着在保护层上。 可以去除第一衬底以暴露外延层。 可以使用第一杂质层作为对准键,在暴露的外延层上形成滤色器层。 可以在滤色器层上形成微透镜。