公开(公告)号：US08841894B1

公开(公告)日：2014-09-23

申请号：US13327934

申请日：2011-12-16

申请人： Shahrzad Naraghi ,  Johann Gaboriau ,  John L. Melanson

发明人： Shahrzad Naraghi ,  Johann Gaboriau ,  John L. Melanson

IPC分类号： H02M3/155

CPC分类号： H03F3/217 ,  H02M1/38 ,  H02M3/1588 ,  H02M2001/0029 ,  H03F1/26 ,  H03F3/181 ,  Y02B70/1466

摘要： An audio switching power amplifier having an output with controlled-slope transitions maintains efficiency while avoiding uncontrolled non-overlap intervals during switching transitions. A pair of transistors forming a half-bridge that supplies an output signal at an output terminal of the amplifier are operated so that neither transistor is fully on during an overlap time period. A current source provides an output current to the output terminal during the non-overlap time period to control the output voltage while changing the transistor that conducts the output current from a first one of the pair of transistors to a second one of the pair of transistors. The current source may be provided by operation of one of the transistors in a current source configuration. The voltage of a gate of one of the transistors can be compared with a threshold to provide an indication of the current.

摘要翻译： 具有受控斜率转换的输出的音频开关功率放大器保持效率，同时在切换转换期间避免不受控制的非重叠间隔。 形成在放大器的输出端提供输出信号的半桥的一对晶体管被操作，使得在重叠时间段期间两个晶体管都不会完全导通。 电流源在非重叠时间周期期间向输出端提供输出电流，以在改变将输出电流从该对晶体管中的第一晶体管导通到该对晶体管中的第二晶体管的晶体管时控制输出电压 。 可以通过当前源配置中的晶体管之一的操作来提供电流源。 可以将晶体管中的一个的栅极的电压与阈值进行比较以提供电流的指示。

公开(公告)号：US20100328130A1

公开(公告)日：2010-12-30

申请号：US12494496

申请日：2009-06-30

申请人： John F. Bulzacchelli ,  Daniel J. Friedman ,  Shahrzad Naraghi ,  Sergey V. Rylov ,  Alexander V. Rylyakov ,  Zeynep Toprak-Deniz

发明人： John F. Bulzacchelli ,  Daniel J. Friedman ,  Shahrzad Naraghi ,  Sergey V. Rylov ,  Alexander V. Rylyakov ,  Zeynep Toprak-Deniz

IPC分类号： H03M1/50

CPC分类号： H03M1/20 ,  H03M1/1215 ,  H03M1/502

摘要： Apparatus and methods are provided relating to time-to-digital based analog-to-digital converter. An apparatus includes a time-to-digital converter based analog-to-digital converter for generating a first signal and a second signal having a timing relationship between a rising edge of the first signal and a rising edge of the second signal based on a sampled input analog voltage level, and converting the timing relationship into a corresponding time-to-digital representation. The time-to-digital representation is obtained without any voltage comparison and current comparison.

摘要翻译： 提供了关于基于时间到数字的模数转换器的装置和方法。 一种装置包括：基于时间 - 数字转换器的模数转换器，用于产生第一信号;以及第二信号，其具有基于采样的第一信号的上升沿和第二信号的上升沿之间的定时关系 输入模拟电压电平，并将定时关系转换成相应的时间 - 数字表示。 在没有任何电压比较和电流比较的情况下获得时间到数字表示。

公开(公告)号：US20110309888A1

公开(公告)日：2011-12-22

申请号：US12818790

申请日：2010-06-18

申请人： John F. BULZACCHELLI ,  Zeynep Toprak DENIZ ,  Daniel Joseph FRIEDMAN ,  Shahrzad NARAGHI ,  Alexander V. RYLYAKOV

发明人： John F. BULZACCHELLI ,  Zeynep Toprak DENIZ ,  Daniel Joseph FRIEDMAN ,  Shahrzad NARAGHI ,  Alexander V. RYLYAKOV

IPC分类号： H03L5/00

CPC分类号： H03L7/0995 ,  H03M1/0612 ,  H03M1/14 ,  H03M1/502 ,  H03M1/60

摘要： Apparatuses and methods are provided relating to a voltage controlled oscillator (VCO) based on current starved inverting delay stages; wherein in each stage a PMOS transistor as header and an NMOS transistor as footer are used with their gate-to-source voltages always equal to analog control voltage. The analog control voltage is also used as the supply voltage of the oscillator. An exemplary apparatus includes a VCO of n stages, where n is an odd number and where each stage includes a current starved inverter where the analog control voltage is also used as the supply voltage of each delay stage.

摘要翻译： 提供了关于基于当前饥饿的反相延迟级的压控振荡器（VCO）的装置和方法; 其中在每个阶段中，使用PMOS晶体管作为集管和​​作为栅极的NMOS晶体管，其栅极至源极电压总是等于模拟控制电压。 模拟控制电压也用作振荡器的电源电压。 示例性装置包括n级的VCO，其中n是奇数，并且其中每级包括当前饥饿逆变器，其中模拟控制电压也用作每个延迟级的电源电压。

公开(公告)号：US08294525B2

公开(公告)日：2012-10-23

申请号：US12818790

申请日：2010-06-18

申请人： John Francis Bulzacchelli ,  Zeynep Toprak Deniz ,  Daniel Joseph Friedman ,  Shahrzad Naraghi ,  Alexander V Rylyakov

发明人： John Francis Bulzacchelli ,  Zeynep Toprak Deniz ,  Daniel Joseph Friedman ,  Shahrzad Naraghi ,  Alexander V Rylyakov

IPC分类号： H03L7/085

CPC分类号： H03L7/0995 ,  H03M1/0612 ,  H03M1/14 ,  H03M1/502 ,  H03M1/60

摘要： Apparatuses and methods are provided relating to a voltage controlled oscillator (VCO) based on current starved inverting delay stages; wherein in each stage a PMOS transistor as header and an NMOS transistor as footer are used with their gate-to-source voltages always equal to analog control voltage. The analog control voltage is also used as the supply voltage of the oscillator. An exemplary apparatus includes a VCO of n stages, where n is an odd number and where each stage includes a current starved inverter where the analog control voltage is also used as the supply voltage of each delay stage.

摘要翻译： 提供了关于基于当前饥饿的反相延迟级的压控振荡器（VCO）的装置和方法; 其中在每个阶段中，使用PMOS晶体管作为集管和​​作为栅极的NMOS晶体管，其栅极至源极电压总是等于模拟控制电压。 模拟控制电压也用作振荡器的电源电压。 示例性装置包括n级的VCO，其中n是奇数，并且其中每级包括当前饥饿逆变器，其中模拟控制电压也用作每个延迟级的电源电压。

公开(公告)号：US07893861B2

公开(公告)日：2011-02-22

申请号：US12494496

申请日：2009-06-30

申请人： John F. Bulzacchelli ,  Daniel J. Friedman ,  Shahrzad Naraghi ,  Sergey V. Rylov ,  Alexander V. Rylyakov ,  Zeynep Toprak-Deniz

发明人： John F. Bulzacchelli ,  Daniel J. Friedman ,  Shahrzad Naraghi ,  Sergey V. Rylov ,  Alexander V. Rylyakov ,  Zeynep Toprak-Deniz

IPC分类号： H03M1/50

CPC分类号： H03M1/20 ,  H03M1/1215 ,  H03M1/502

摘要： Apparatus and methods are provided relating to time-to-digital based analog-to-digital converter. An apparatus includes a time-to-digital converter based analog-to-digital converter for generating a first signal and a second signal having a timing relationship between a rising edge of the first signal and a rising edge of the second signal based on a sampled input analog voltage level, and converting the timing relationship into a corresponding time-to-digital representation. The time-to-digital representation is obtained without any voltage comparison and current comparison.

摘要翻译： 提供了关于基于时间到数字的模数转换器的装置和方法。 一种装置包括：基于时间 - 数字转换器的模数转换器，用于产生第一信号;以及第二信号，其具有基于采样的第一信号的上升沿和第二信号的上升沿之间的定时关系 输入模拟电压电平，并将定时关系转换成相应的时间 - 数字表示。 在没有任何电压比较和电流比较的情况下获得时间到数字表示。