公开(公告)号：US6022797A

公开(公告)日：2000-02-08

申请号：US977347

申请日：1997-11-24

申请人： Shigeo Ogasawara ,  Shigeru Takahashi ,  Noriaki Oka ,  Tadayasu Miki ,  Masahito Hiroshima

发明人： Shigeo Ogasawara ,  Shigeru Takahashi ,  Noriaki Oka ,  Tadayasu Miki ,  Masahito Hiroshima

IPC分类号： H01L21/28 ,  H01L21/60 ,  H01L21/768 ,  H01L21/82 ,  H01L21/822 ,  H01L23/485 ,  H01L23/522 ,  H01L27/04 ,  H01L27/118 ,  H01L21/4763 ,  H01L23/48

CPC分类号： H01L24/48 ,  H01L23/5226 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05093 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/13099 ,  H01L2224/45144 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L24/45 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/30105

摘要： First through holes of a relatively small diameter and second through holes of a relatively great diameter are formed in proper shapes by separate processes, respectively, in a first layer insulating film. The second through holes are tapered toward a layer underlying the first layer insulating film. First, the first through holes are formed in the first layer insulating film, the first through holes are filled up with plug electrodes, and the second through holes are formed in the first layer insulating film. When filling up the first and the second through holes formed in the first layer insulating film with plug electrodes, a first conductive film deposited over the first layer insulating film is etched back to fill up the first through holes with the plug electrodes, and then etch back residues remaining on the side walls of the second through holes are removed.

摘要翻译： 在第一层绝缘膜中分别通过分开的工艺形成相当大直径的第一通孔和相对较大直径的第二通孔。 第二通孔朝向第一层绝缘膜下面的层逐渐变细。 首先，在第一层绝缘膜中形成第一通孔，第一通孔填充有塞电极，第二通孔形成在第一层绝缘膜中。 当用塞电极填充形成在第一层绝缘膜中的第一和第二通孔时，沉积在第一层绝缘膜上的第一导电膜被回蚀以用插塞电极填充第一通孔，然后蚀刻 残留在第二通孔的侧壁上的残余残留物被去除。

公开(公告)号：US5892276A

公开(公告)日：1999-04-06

申请号：US838260

申请日：1997-04-17

申请人： Tadayasu Miki ,  Shigeo Ogasawara ,  Noriaki Oka ,  Shigeru Takahashi ,  Mitsuaki Katagiri

发明人： Tadayasu Miki ,  Shigeo Ogasawara ,  Noriaki Oka ,  Shigeru Takahashi ,  Mitsuaki Katagiri

IPC分类号： H01L27/04 ,  H01L21/82 ,  H01L21/822 ,  H01L23/485 ,  H01L27/118 ,  H01L23/48

CPC分类号： H01L24/05 ,  H01L24/06 ,  H01L2224/02166 ,  H01L2224/05093 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/4943 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/05042 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/30105

摘要： A semiconductor integrated circuit having three or more layers of wiring is provided with a plurality of lines of bonding pads arranged along the outer peripheral portion of a semiconductor chip. The bonding pads on the inner line side and those on the outer line side are arranged in a zigzag manner. First outgoing wiring for electrically connecting the bonding pads on the inner line side and internal circuits (input/output buffer circuits) is formed in one layer of wiring or a plurality of layers of wiring including at least the uppermost layer of wiring, and second outgoing wiring for electrically connecting the bonding pads on the outer line side and the internal circuits (the input/output buffer circuits) is formed in a plurality of layers of wiring other than the layer in which the first outgoing wiring is formed. Further, the first outgoing wiring and the second outgoing wiring are formed in different layers of wiring and at least one of the outgoing wiring films is formed of a plurality of layers of wiring.

摘要翻译： 具有三层或多层布线的半导体集成电路设置有沿着半导体芯片的外围部分布置的多条接合焊盘。 内线侧的接合焊盘和外侧的接合焊盘以锯齿形的方式配置。 用于电连接内线侧的接合焊盘和内部电路（输入/输出缓冲电路）的第一输出布线形成在至少包括布线的最上层的一层布线或多层布线中，并且第二输出 用于电连接外线侧的接合焊盘和内部电路（输入/输出缓冲电路）的布线形成在除了形成第一输出布线的层之外的多个布线层中。 此外，第一输出布线和第二输出布线形成在不同的布线层中，并且至少一个输出布线膜由多层布线形成。

公开(公告)号：US5986294A

公开(公告)日：1999-11-16

申请号：US226212

申请日：1999-01-07

申请人： Tadayasu Miki ,  Shigeo Ogasawara ,  Noriaki Oka ,  Shigeru Takahashi ,  Mitsuaki Katagiri

发明人： Tadayasu Miki ,  Shigeo Ogasawara ,  Noriaki Oka ,  Shigeru Takahashi ,  Mitsuaki Katagiri

IPC分类号： H01L27/04 ,  H01L21/82 ,  H01L21/822 ,  H01L23/485 ,  H01L27/118 ,  H01L27/10

CPC分类号： H01L24/05 ,  H01L24/06 ,  H01L2224/02166 ,  H01L2224/05093 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/4943 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/05042 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/30105

摘要： A semiconductor integrated circuit having three or more layers of wiring is provided with a plurality of lines of bonding pads arranged along the outer peripheral portion of a semiconductor chip. The bonding pads on the inner line side and those on the outer line side are arranged in a zigzag manner. First outgoing wiring for electrically connecting the bonding pads on the inner line side and internal circuits (input/output buffer circuits) is formed in one layer of wiring or a plurality of layers of wiring including at least the uppermost layer of wiring, and second outgoing wiring for electrically connecting the bonding pads on the outer line side and the internal circuits (the input/output buffer circuits) is formed in a plurality of layers of wiring other than the layer in which the first outgoing wiring is formed. Further, the first outgoing wiring and the second outgoing wiring are formed in different layers of wiring and at least one of the outgoing wiring films is formed of a plurality of layers of wiring.