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    Incrementing successive write operations to a plurality of memory devices
    4.
    发明授权
    Incrementing successive write operations to a plurality of memory devices 有权
    将连续的写入操作递增到多个存储器件

    公开(公告)号：US07421564B1

    公开(公告)日：2008-09-02

    申请号：US11356150

    申请日：2006-02-17

    申请人： Rami Rahim ,  Pradeep Sindhu ,  Raymond Marcelino Manese Lim ,  Sreeram Veeragandham ,  David Skinner

    发明人： Rami Rahim ,  Pradeep Sindhu ,  Raymond Marcelino Manese Lim ,  Sreeram Veeragandham ,  David Skinner

    IPC分类号： G06F12/06

    CPC分类号： G06F12/0684 ,  G06F12/02 ,  G06F12/0813

    摘要： A centralized memory allocation system utilizes write pointer drift correction. The memory stores data units. The memory controller receives a write request associated with a data unit and stores the data unit in the memory. The memory controller also transmits a reply that includes an address where the data unit is stored. The control logic receives the reply and determines whether the address in the reply differs from an address included in replies associated with other memory controllers by a given address range. When this occurs, the control logic performs a corrective action to bring an address associated with the memory controller back within a defined range.

    摘要翻译： 集中式存储器分配系统利用写指针漂移校正。 内存存储数据单元。 存储器控制器接收与数据单元相关联的写请求，并将数据单元存储在存储器中。 存储器控制器还发送包括存储数据单元的地址的应答。 控制逻辑接收答复，并确定答复中的地址是否与给定地址范围与其他存储器控制器相关的回复中包含的地址不同。 当这种情况发生时，控制逻辑执行纠正措施以使与存储器控制器相关联的地址返回到定义的范围内。

    Centralized memory allocation with write pointer drift correction
    5.
    发明授权
    Centralized memory allocation with write pointer drift correction 有权
    集中存储器分配与写指针漂移校正

    公开(公告)号：US08880808B1

    公开(公告)日：2014-11-04

    申请号：US12181930

    申请日：2008-07-29

    申请人： Rami Rahim ,  Pradeep Sindhu ,  Raymond Marcelino Manese Lim ,  Sreeram Veeragandham ,  David Skinner

    发明人： Rami Rahim ,  Pradeep Sindhu ,  Raymond Marcelino Manese Lim ,  Sreeram Veeragandham ,  David Skinner

    IPC分类号： G06F12/06 ,  G06F12/02

    CPC分类号： G06F12/0684 ,  G06F12/02 ,  G06F12/0813

    摘要： A system for writing data includes a memory, at least one memory controller and control logic. The memory stores data units. The memory controller receives a write request associated with a data unit and stores the data unit in the memory. The memory controller also transmits a reply that includes an address where the data unit is stored. The control logic receives the reply and determines whether the address in the reply differs from an address included in replies associated with other memory controllers by a threshold amount. When this occurs, the control logic performs a corrective action to bring an address associated with the memory controller back within a defined range.

    摘要翻译： 用于写入数据的系统包括存储器，至少一个存储器控制器和控制逻辑。 内存存储数据单元。 存储器控制器接收与数据单元相关联的写请求，并将数据单元存储在存储器中。 存储器控制器还发送包括存储数据单元的地址的应答。 控制逻辑接收答复并确定答复中的地址是否与包含在与其他存储器控制器相关联的应答中的地址相差阈值。 当这种情况发生时，控制逻辑执行纠正措施以使与存储器控制器相关联的地址返回到定义的范围内。