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公开(公告)号:US09466643B2
公开(公告)日:2016-10-11
申请号:US14482654
申请日:2014-09-10
CPC分类号: H01L27/18 , G11C11/44 , G11C19/32 , H01L39/025 , H01L39/22 , H01L39/223 , H01L39/24 , H03K19/195
摘要: One example includes a superconducting circuit. The circuit includes a plurality of layers comprising a first conductor layer and a second conductor layer overlying the first conductor layer, each of the first and second conductor layers comprising at least one signal element. The circuit also includes a ground grid that is conductively coupled to ground and comprises a first plurality of parallel ground lines that occupy the first conductor layer and extend in a first direction and a second plurality of parallel ground lines that occupy the second conductor layer and extend in a second direction that is orthogonal with respect to the first direction.
摘要翻译: 一个例子包括超导电路。 该电路包括多个层,包括第一导体层和覆盖第一导体层的第二导体层,第一和第二导体层中的每一个包括至少一个信号元件。 电路还包括导电耦合到地面的接地栅极,并且包括占据第一导体层并在第一方向上延伸的第一多个平行接地线和占据第二导体层并延伸的第二多个平行接地线的接地栅极 在相对于第一方向正交的第二方向上。
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公开(公告)号:US20170229167A1
公开(公告)日:2017-08-10
申请号:US15170616
申请日:2016-06-01
申请人: WILLIAM ROBERT REOHR , STEVEN BRIAN SHAUCK , DONALD LYNN MILLER , JEREMY WILLIAM HORNER , NATHAN TRENT JOSEPHSEN
发明人: WILLIAM ROBERT REOHR , STEVEN BRIAN SHAUCK , DONALD LYNN MILLER , JEREMY WILLIAM HORNER , NATHAN TRENT JOSEPHSEN
IPC分类号: G11C11/44
CPC分类号: G11C11/44 , B82Y10/00 , B82Y20/00 , B82Y25/00 , G11C7/12 , G11C7/22 , G11C8/04 , G11C8/18 , G11C11/16 , G11C11/1655 , G11C11/1657 , G11C11/1659 , G11C11/1693 , G11C19/32
摘要: One embodiment describes a quantum memory system. The system includes an array controller that comprises a plurality of flux pumps configured to provide write currents in a write operation and read currents in a read operation with respect to a plurality of quantum memory cells, the array controller being configured to control timing associated with the write operation and the read operation in response to memory request signals based on application of the write currents and the read currents and based on recharging flux associated with the plurality of flux pumps.
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公开(公告)号:US09384827B1
公开(公告)日:2016-07-05
申请号:US14639688
申请日:2015-03-05
申请人: William Robert Reohr , Steven Brian Shauck , Donald Lynn Miller , Jeremy William Horner , Nathan Trent Josephsen
发明人: William Robert Reohr , Steven Brian Shauck , Donald Lynn Miller , Jeremy William Horner , Nathan Trent Josephsen
CPC分类号: G11C11/44 , B82Y10/00 , B82Y20/00 , B82Y25/00 , G11C7/12 , G11C7/22 , G11C8/04 , G11C8/18 , G11C11/16 , G11C11/1655 , G11C11/1657 , G11C11/1659 , G11C11/1693 , G11C19/32
摘要: One embodiment describes a quantum memory system. The system includes a plurality of quantum memory cells arranged in an array of rows and columns. Each of the plurality of quantum memory cells can be configured to store a binary logic state in response to write currents in a write operation and configured to provide an indication of the binary logic state in response to read currents in a read operation. The system also includes an array controller comprising a plurality of flux pumps configured to provide the write currents and the read currents with respect to the rows and columns. The array controller can be configured to control timing associated with the write operation and the read operation in response to memory request signals based on application of the write currents and the read currents and based on recharging flux associated with the plurality of flux pumps.
摘要翻译: 一个实施例描述了量子存储器系统。 该系统包括以行和列阵列排列的多个量子存储单元。 多个量子存储器单元中的每一个可以被配置为响应于写入操作中的写入电流来存储二进制逻辑状态,并且被配置为响应读取操作中的读取电流来提供二进制逻辑状态的指示。 该系统还包括阵列控制器,该阵列控制器包括被配置为相对于行和列提供写入电流和读取电流的多个磁通泵。 阵列控制器可以被配置为基于写入电流和读取电流的应用以及基于与多个磁通泵相关联的再充电通量来响应于存储器请求信号来控制与写入操作和读取操作相关联的定时。
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公开(公告)号:US10083148B2
公开(公告)日:2018-09-25
申请号:US15217003
申请日:2016-07-22
申请人: Steven Brian Shauck
发明人: Steven Brian Shauck
IPC分类号: G06K9/38 , G06F13/42 , G01R19/25 , H03K3/38 , H03K19/003 , H03K19/195 , G01R27/02
摘要: One embodiment describes a reciprocal quantum logic (RQL) receiver system. The RQL system is configured to convert a serial input data stream provided from a serial data transmitter into an RQL data stream. The RQL receiver system includes a sampling controller configured to oversample the serial input data stream via a plurality of samples over each sampling window of an RQL clock signal to determine a transition sample corresponding to a transition in a digital value of the serial input data stream in a given one sampling window of the RQL clock signal. The RQL receiver system can be further configured to capture the digital value of the serial input data stream via a capture sample that is a predetermined number of samples subsequent to the transition sample in each sampling window of the RQL clock signal.
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公开(公告)号:US20180024961A1
公开(公告)日:2018-01-25
申请号:US15217003
申请日:2016-07-22
申请人: STEVEN BRIAN SHAUCK
发明人: STEVEN BRIAN SHAUCK
IPC分类号: G06F13/42
CPC分类号: G06F13/4286 , G01R19/2509 , G01R27/02 , G06K9/38 , H03K3/38 , H03K19/00323 , H03K19/195
摘要: One embodiment describes a reciprocal quantum logic (RQL) receiver system. The RQL system is configured to convert a serial input data stream provided from a serial data transmitter into an RQL data stream. The RQL receiver system includes a sampling controller configured to oversample the serial input data stream via a plurality of samples over each sampling window of an RQL clock signal to determine a transition sample corresponding to a transition in a digital value of the serial input data stream in a given one sampling window of the RQL clock signal. The RQL receiver system can be further configured to capture the digital value of the serial input data stream via a capture sample that is a predetermined number of samples subsequent to the transition sample in each sampling window of the RQL clock signal.
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公开(公告)号:US09761305B2
公开(公告)日:2017-09-12
申请号:US15170616
申请日:2016-06-01
申请人: William Robert Reohr , Steven Brian Shauck , Donald Lynn Miller , Jeremy William Horner , Nathan Trent Josephsen
发明人: William Robert Reohr , Steven Brian Shauck , Donald Lynn Miller , Jeremy William Horner , Nathan Trent Josephsen
CPC分类号: G11C11/44 , B82Y10/00 , B82Y20/00 , B82Y25/00 , G11C7/12 , G11C7/22 , G11C8/04 , G11C8/18 , G11C11/16 , G11C11/1655 , G11C11/1657 , G11C11/1659 , G11C11/1693 , G11C19/32
摘要: One embodiment describes a quantum memory system. The system includes an array controller that comprises a plurality of flux pumps configured to provide write currents in a write operation and read currents in a read operation with respect to a plurality of quantum memory cells, the array controller being configured to control timing associated with the write operation and the read operation in response to memory request signals based on application of the write currents and the read currents and based on recharging flux associated with the plurality of flux pumps.
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公开(公告)号:US20160071903A1
公开(公告)日:2016-03-10
申请号:US14482654
申请日:2014-09-10
CPC分类号: H01L27/18 , G11C11/44 , G11C19/32 , H01L39/025 , H01L39/22 , H01L39/223 , H01L39/24 , H03K19/195
摘要: One example includes a superconducting circuit. The circuit includes a plurality of layers comprising a first conductor layer and a second conductor layer overlying the first conductor layer, each of the first and second conductor layers comprising at least one signal element. The circuit also includes a ground grid that is conductively coupled to ground and comprises a first plurality of parallel ground lines that occupy the first conductor layer and extend in a first direction and a second plurality of parallel ground lines that occupy the second conductor layer and extend in a second direction that is orthogonal with respect to the first direction.
摘要翻译: 一个例子包括超导电路。 该电路包括多个层,包括第一导体层和覆盖第一导体层的第二导体层,第一和第二导体层中的每一个包括至少一个信号元件。 电路还包括导电耦合到地面的接地栅极,并且包括占据第一导体层并在第一方向上延伸的第一多个平行接地线和占据第二导体层并延伸的第二多个平行接地线的接地栅极 在相对于第一方向正交的第二方向上。
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