公开(公告)号：US08902674B2

公开(公告)日：2014-12-02

申请号：US13451110

申请日：2012-04-19

申请人： In Gon Yang ,  Duck Ju Kim ,  Jae Won Cha ,  Sung Hoon Ahn ,  Tae Ho Jeon

发明人： In Gon Yang ,  Duck Ju Kim ,  Jae Won Cha ,  Sung Hoon Ahn ,  Tae Ho Jeon

IPC分类号： G11C7/00 ,  G11C7/10

CPC分类号： G11C7/00 ,  G11C7/10 ,  G11C11/5642 ,  G11C16/0483

摘要： A semiconductor memory device includes a memory cell array configured to include memory cells, peripheral circuits configured to read out data stored in a selected memory cell in a read operation, and a controller configured to control the peripheral circuits so that the peripheral circuits sense a voltage level of the bit line when a first read voltage of the read voltages is supplied to the word line and the peripheral circuits sense voltage levels of the bit line when a second read voltage lower than the first read voltage by a specific level and a third read voltage higher than the first read voltage by the specific level are supplied to the word line in order to determine whether a threshold voltage of the selected memory cell falls within a set voltage distribution in the read operation.

摘要翻译： 半导体存储器件包括：存储单元阵列，被配置为包括存储器单元，外围电路，被配置为在读取操作中读出存储在选择的存储单元中的数据;以及控制器，被配置为控制外围电路，使得外围电路感测电压 当读取电压的第一读取电压被提供给字线时，位线的电平，并且当低于第一读取电压的第二读取电压达到特定电平和第三读取时，外围电路检测位线的电压电平 将高于第一读取电压的特定电平的电压提供给字线，以便确定所选择的存储器单元的阈值电压是否落在读取操作中的设置电压分布内。

公开(公告)号：US08812777B2

公开(公告)日：2014-08-19

申请号：US13488897

申请日：2012-06-05

申请人： Jae-Won Cha ,  Sung-Hoon Ahn

发明人： Jae-Won Cha ,  Sung-Hoon Ahn

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/06 ,  G11C16/3418

摘要： A nonvolatile memory device includes: N (N is an integer equal to or greater than 2) number of nonvolatile memory cells disposed in a flag area of a page, N number of flag page buffers configured to input and output flag data to and from the nonvolatile memory cells of the flag area, and a data input/output control unit configured to select R number of flag page buffers so that the flag data is inputted and outputted from the R selected flag page buffers and no flag data is inputted and outputted through unselected N-R number of flag page buffers, wherein no one flag page buffer of the R selected flag page buffers is immediately adjacent to another one of the R selected flag page buffers.

摘要翻译： 非易失性存储器件包括：N（N是等于或大于2的整数）设置在页面的标志区域中的非易失性存储器单元的数量，N个标志页缓冲器，被配置为输入和输出标记数据 标志区的非易失性存储单元，以及数据输入/输出控制单元，被配置为选择标志页缓冲器的R个数，使得标志数据从R选择的标志页缓冲器输入和输出，并且没有标志数据被输入并通过 未选择的NR个标志页缓冲器，其中R选择的标记页缓冲器的没有一个标志页缓冲器与R选择的标记页缓冲器中的另一个紧邻。

公开(公告)号：US20130210294A1

公开(公告)日：2013-08-15

申请号：US13530723

申请日：2012-06-22

申请人： Sung Hoon AHN ,  Hyung Jung KIM ,  Sung Hyuk SONG ,  Min Woo HAN ,  Gil Yong LEE

发明人： Sung Hoon AHN ,  Hyung Jung KIM ,  Sung Hyuk SONG ,  Min Woo HAN ,  Gil Yong LEE

IPC分类号： B63H1/32 ,  B63G8/08

CPC分类号： B63G8/08 ,  B63B2035/007 ,  B63B2231/28 ,  B63G2008/002 ,  B63G2008/004 ,  B63H1/32 ,  B63H1/36 ,  H02N2/028

摘要： Disclosed is an underwater robot based on flapping comprising: an actuator including a smart material and directional material, wherein the smart material is changed in its shape according to an external signal, and the directional material restricts a deformation in a specific direction; a body connected with the actuator; and a controller which makes the actuator perform a first stroke in a direction, and a second stroke in another direction being different from that of the first stroke; wherein the actuator performs at least one deformation of bending and twisting according to position of the smart material and directionality of the directional material, and furthermore enables to simultaneously perform the smooth bending and twisting motion with the simple structure by adjusting the position of the smart material functioning as the active component, and the directionality of the directional material functioning as the passive component.

摘要翻译： 本发明涉及一种基于拍打的水下机器人，其特征在于包括：具有智能材料和方向材料的致动器，其中所述智能材料根据外部信号改变其形状，并且所述方向材料限制特定方向的变形; 与致动器连接的主体; 以及控制器，其使得所述致动器沿另一方向执行与所述第一冲程不同的方向的第一冲程; 其中致动器根据智能材料的位置和定向材料的方向性执行弯曲和扭转的至少一个变形，此外，通过调整智能材料的位置，能够以简单的结构同时进行平滑的弯曲和扭曲运动 作为有源元件，定向材料的方向性作为被动元件。

公开(公告)号：US20130076509A1

公开(公告)日：2013-03-28

申请号：US13701609

申请日：2011-06-03

申请人： Sung Hoon Ahn

发明人： Sung Hoon Ahn

IPC分类号： G08B21/18

CPC分类号： G08B21/18 ,  A61F13/42 ,  A61F13/44

摘要： The present invention relates to detection of defecation/urination of human bodies. In particular, the present invention provides a defecation/urination detection system and method using an RFID passive tag and a reader to measure a change in the sensitivity (or receiving count) of the tag and then inform a user of the incidence in real time mode. The defecation/urination detection system comprises: a first step of registering a defecation/urination detection tag in one-to-one correspondence upon receiving a request for registration of the defecation/urination detection tag, following the initiation; a second step of detecting an energy level of a received signal that is generated from the registered defecation/urination detection tag, thereby detecting sensitivity based on the energy level; and a third step of analyzing the detected sensitivity and then making an alarm sound and a display if there is a change in the sensitivity of the defecation/urination detection tag due to defecation/urination, regarding the change as a criterion for determination of the incidence of defecation/urination.

摘要翻译： 本发明涉及人体排便/排尿检测。 特别地，本发明提供了使用RFID无源标签和读取器来测量标签的灵敏度（或接收计数）变化的排便/排尿检测系统和方法，然后以实时模式通知用户入射 。 排便/排尿检测系统包括：在开始之后接收到排便/排尿检测标签的登记请求，一一对应地登记排便/排尿检测标签的第一步骤; 第二步骤，检测从注册排便/检查标签产生的接收信号的能级，从而基于能级检测灵敏​​度; 以及第三步骤，分析检测到的灵敏度，然后如果由于排便/排尿而导致的排便/排尿检测标签的灵敏度发生变化，则作为用于确定发生率的标准的变化，进行报警声和显示 排便/排尿

公开(公告)号：US20120314501A1

公开(公告)日：2012-12-13

申请号：US13492287

申请日：2012-06-08

申请人： Sung Hoon AHN

发明人： Sung Hoon AHN

IPC分类号： G11C16/10

CPC分类号： G11C16/10 ,  G11C16/0483 ,  G11C16/3427

摘要： A method of programming a semiconductor device includes performing a Least Significant Bit (LSB) program operation on selected memory cells, performing a soft program operation on the remaining memory cells other than memory cells on which the LSB program operation has been performed, and performing a Most Significant Bit (MSB) program operation on memory cells, selected from among the memory cells on which the LSB program operation has been performed and the memory cells on which the soft program operation has been performed.

摘要翻译： 一种编程半导体器件的方法包括对所选择的存储器单元执行最低有效位（LSB）编程操作，对已经执行了LSB编程操作的存储单元以外的剩余存储单元执行软编程操作，并执行 从执行了LSB编程操作的存储单元中选择的存储器单元上的最高有效位（MSB）编程操作和执行了软程序操作的存储单元。

公开(公告)号：US08144493B2

公开(公告)日：2012-03-27

申请号：US12633303

申请日：2009-12-08

申请人： Sung Hoon Ahn

发明人： Sung Hoon Ahn

IPC分类号： G11C15/00

CPC分类号： G11C15/046

摘要： A code address memory (CAM) cell memory device comprises a first storage unit comprising a first nonvolatile memory cell configured to output a power source voltage in response to a read voltage, and a second storage unit comprising a second nonvolatile memory cell configured to output a ground voltage in response to the read voltage.

摘要翻译： 代码地址存储器（CAM）单元存储器件包括：第一存储单元，包括被配置为响应于读取电压输出电源电压的第一非易失性存储器单元;以及第二存储单元，包括第二非易失性存储器单元，其被配置为输出 接地电压响应于读取电压。

公开(公告)号：US20110127532A1

公开(公告)日：2011-06-02

申请号：US12856456

申请日：2010-08-13

申请人： Sung-Hoon AHN ,  Kyoung-Nam Lim ,  Hwan Kim

发明人： Sung-Hoon AHN ,  Kyoung-Nam Lim ,  Hwan Kim

IPC分类号： H01L33/08 ,  H01L33/00

CPC分类号： H01L27/1288 ,  H01L27/124

摘要： An array substrate for a liquid crystal display device includes a gate line on a substrate; a gate electrode connected to the gate line; a gate insulating layer on the gate line and the gate electrode and including a gate opening; an active layer on the gate insulating layer and overlapping the gate electrode; an ohmic contact layer on the active layer; a source electrode on the ohmic contact layer; a drain electrode on the ohmic contact layer and spaced apart from the source electrode, wherein one end of the drain electrode is disposed in the gate opening; a data line on the gate insulating layer and connected to the source electrode, the data line crossing the gate line; a passivation layer on the data line and the source and drain electrodes and including a pixel opening, wherein the pixel opening exposes the drain electrode in the gate opening and a portion of the gate insulating layer; and a pixel electrode on the gate insulating layer and in the pixel opening, the pixel electrode contacting the one end of the drain electrode in the gate opening.

摘要翻译： 液晶显示装置的阵列基板包括在基板上的栅极线; 连接到栅极线的栅电极; 栅极线上的栅极绝缘层和栅极电极，并且包括栅极开口; 栅极绝缘层上的有源层并与栅电极重叠; 有源层上的欧姆接触层; 欧姆接触层上的源电极; 在欧姆接触层上并与源电极隔开的漏电极，其中漏电极的一端设置在栅极开口中; 栅极绝缘层上的数据线，与源电极连接，数据线与栅极线交叉; 数据线上的钝化层以及源极和漏极，并包括像素开口，其中像素开口使栅极开口中的漏电极和栅极绝缘层的一部分露出; 以及栅极绝缘层和像素开口中的像素电极，所述像素电极与所述栅极开口中的所述漏极电极的一端接触。

公开(公告)号：US10458397B2

公开(公告)日：2019-10-29

申请号：US15441106

申请日：2017-02-23

申请人： Sung Hoon Ahn ,  Min Woo Han

发明人： Sung Hoon Ahn ,  Min Woo Han

IPC分类号： F03G7/06

摘要： Disclosed is a loop linked smart morphing actuator. The actuator includes a first area morphed in a first pattern and a second area morphed in a second pattern according to an external signal. The first area includes a first unit cell morphed in a first direction. The second area includes a second unit cell morphed in a second direction. The first unit cell and the second unit cell may be configured in a loop type knit structure. The second direction is opposite to the first direction, the second pattern is a pattern which has a symmetrical relationship with the first pattern and is provided opposite to the first pattern. In regard to a structure or a shape, provided is an actuator including a knit structure for realizing various driving forms which cannot be predicted through predetermined first and second patterns or a simple combination thereof.

公开(公告)号：US09168989B2

公开(公告)日：2015-10-27

申请号：US13530723

申请日：2012-06-22

申请人： Sung Hoon Ahn ,  Hyung Jung Kim ,  Sung Hyuk Song ,  Min Woo Han ,  Gil Yong Lee

发明人： Sung Hoon Ahn ,  Hyung Jung Kim ,  Sung Hyuk Song ,  Min Woo Han ,  Gil Yong Lee

IPC分类号： B63H1/36 ,  H02N2/00 ,  B63G8/08 ,  H02N2/02 ,  B63H1/32 ,  B63G8/00 ,  B63B35/00

CPC分类号： B63G8/08 ,  B63B2035/007 ,  B63B2231/28 ,  B63G2008/002 ,  B63G2008/004 ,  B63H1/32 ,  B63H1/36 ,  H02N2/028

摘要： Disclosed is an underwater robot based on flapping comprising: an actuator including a smart material and directional material, wherein the smart material is changed in its shape according to an external signal, and the directional material restricts a deformation in a specific direction; a body connected with the actuator; and a controller which makes the actuator perform a first stroke in a direction, and a second stroke in another direction being different from that of the first stroke; wherein the actuator performs at least one deformation of bending and twisting according to position of the smart material and directionality of the directional material, and furthermore enables to simultaneously perform the smooth bending and twisting motion with the simple structure by adjusting the position of the smart material functioning as the active component, and the directionality of the directional material functioning as the passive component.

摘要翻译： 本发明涉及一种基于拍打的水下机器人，其特征在于包括：具有智能材料和方向材料的致动器，其中所述智能材料根据外部信号改变其形状，并且所述方向材料限制特定方向的变形; 与致动器连接的主体; 以及控制器，其使得所述致动器沿另一方向执行与所述第一冲程不同的方向的第一冲程; 其中致动器根据智能材料的位置和定向材料的方向性执行弯曲和扭转的至少一个变形，此外，通过调整智能材料的位置，能够以简单的结构同时进行平滑的弯曲和扭曲运动 作为有源元件，定向材料的方向性作为被动元件。

公开(公告)号：US08830744B2

公开(公告)日：2014-09-09

申请号：US13492287

申请日：2012-06-08

申请人： Sung Hoon Ahn

发明人： Sung Hoon Ahn

IPC分类号： G11C16/04 ,  G11C16/10 ,  G11C16/34

CPC分类号： G11C16/10 ,  G11C16/0483 ,  G11C16/3427

摘要： A method of programming a semiconductor device includes performing a Least Significant Bit (LSB) program operation on selected memory cells, performing a soft program operation on the remaining memory cells other than memory cells on which the LSB program operation has been performed, and performing a Most Significant Bit (MSB) program operation on memory cells, selected from among the memory cells on which the LSB program operation has been performed and the memory cells on which the soft program operation has been performed.

摘要翻译： 一种编程半导体器件的方法包括对所选择的存储器单元执行最低有效位（LSB）编程操作，对已经执行了LSB编程操作的存储单元以外的剩余存储单元执行软编程操作，并执行 从执行了LSB编程操作的存储单元中选择的存储器单元上的最高有效位（MSB）编程操作和执行了软程序操作的存储单元。