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公开(公告)号：US06864702B1
公开(公告)日：2005-03-08
申请号：US10746984
申请日：2003-12-24
CPC分类号： G01R31/2858
摘要： The present invention provides a system for stress testing an oxide structure to determine that structure's reliability in overstress conditions. The present invention provides an overstress test structure (400) that comprises a first transistor (406), having a first terminal coupled to ground, a second terminal coupled to a control signal (402), and a third terminal coupled to a first end of a first resistive element (412). A first voltage source (414) is coupled to the second end of the first resistive element. A second resistive element (416) is intercoupled between the second end of the first resistive element and ground. A second transistor (418) has a first terminal coupled to the second end of the first resistive element, a second terminal coupled to the first end of the first resistive element, and a third terminal coupled to a first node (420). A third resistive element (422) is intercoupled between the third terminal of the second transistor and ground; and a third transistor (424) has a first terminal coupled (426) to the oxide structure, a second terminal coupled to the first end of the first resistive elerment, and a third terminal coupled to a second voltage source (428).
摘要翻译： 本发明提供了一种用于对氧化物结构进行应力测试以确定该结构在过应力条件下的可靠性的系统。 本发明提供了一种过应力测试结构（400），其包括第一晶体管（406），其具有耦合到地的第一端子，耦合到控制信号（402）的第二端子和耦合到控制信号 第一电阻元件（412）。 第一电压源（414）耦合到第一电阻元件的第二端。 第二电阻元件（416）在第一电阻元件的第二端和地之间相互配合。 第二晶体管（418）具有耦合到第一电阻元件的第二端的第一端子，耦合到第一电阻元件的第一端的第二端子和耦合到第一节点（420）的第三端子。 第三电阻元件（422）在第二晶体管的第三端与地之间相互耦合; 和第三晶体管（424）具有耦合到所述氧化物结构的第一端子（426），耦合到所述第一电阻器的第一端的第二端子和耦合到第二电压源（428）的第三端子。
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2.发明授权Programmable voltage regulator configurable for double power density and reverse blocking 有权可编程稳压器可配置双功率密度和反向阻塞公开(公告)号：US07071664B1
公开(公告)日：2006-07-04
申请号：US11017177
申请日：2004-12-20
申请人： Ross E. Teggatz , Sanmukh M. Patel , Rex M. Teggatz , Suribhotla V. Rajasekhar , Valerian Mayega
发明人： Ross E. Teggatz , Sanmukh M. Patel , Rex M. Teggatz , Suribhotla V. Rajasekhar , Valerian Mayega
IPC分类号： G05F1/44
CPC分类号： H02J7/0063
摘要： A programmable voltage regulator configurable for reverse blocking and double power density is disclosed herein. The programmable voltage regulator includes an error amplifier that couples to receive a reference voltage. A first NMOS pass transistor connects between an auxiliary voltage input node and the output terminal of the voltage regulator, wherein the first NMOS pass transistor is biased by the output of the error amplifier. Connected between the source of the first NMOS pass transistor and the second input of the error amplifier, a feedback network provides feedback for the voltage regulator. A second NMOS pass transistor connects between the first power supply and the auxiliary voltage input node. Furthermore, an independent node control circuit biases the second NMOS pass transistor such that in a first mode of operation, a first control signal input is operable to receive a signal for controlling the second NMOS pass transistor during reverse battery condition. In a second mode of operation, independent node control circuit includes a second control signal input that is operable to couple to the output terminal of the error amplifier while simultaneously the first power supply rail is operable to couple to the output terminal of the voltage regulator to provide double power density.
摘要翻译： 本文公开了可配置用于反向阻塞和双功率密度的可编程电压调节器。 可编程电压调节器包括耦合以接收参考电压的误差放大器。 第一NMOS传输晶体管连接在辅助电压输入节点和电压调节器的输出端之间，其中第一NMOS传输晶体管被误差放大器的输出偏置。 连接在第一NMOS传输晶体管的源极和误差放大器的第二输入端之间，反馈网络为电压调节器提供反馈。 第二NMOS传输晶体管连接在第一电源和辅助电压输入节点之间。 此外，独立节点控制电路偏置第二NMOS传输晶体管，使得在第一操作模式中，第一控制信号输入可操作以在反向电池状态期间接收用于控制第二NMOS传输晶体管的信号。 在第二操作模式中，独立节点控制电路包括第二控制信号输入，其可操作以耦合到误差放大器的输出端，同时第一电源轨可操作以耦合到电压调节器的输出端， 提供双倍功率密度。
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公开(公告)号：US20110314310A1
公开(公告)日：2011-12-22
申请号：US12819550
申请日：2010-06-21
IPC分类号： G06F1/32
CPC分类号： G06F1/3275 , G06F1/3287 , Y02D10/13 , Y02D10/14 , Y02D10/171
摘要： A system and method are disclosed for capturing pre- and post-event data for random events using minimum power. Real-time data is captured and stored in a continuous loop in a segment of a first memory. Upon detection of a designated event, a second memory is powered-on and post-event data is stored to a segment of the second memory. After a designated data capture window, the second memory is powered-off and real-time data is captured in an unused segment of the first memory. The post-event data may be captured in the unused segment of the first memory and later transferred to the second memory. Auto-address logic monitors and controls the storage and retrieval of pre- and post-event in the first and second memory. An energy management system determines and controls which segments of the first and second memory should be powered-on or kept in the stasis mode to store event data.
摘要翻译： 公开了一种用于使用最小功率捕获用于随机事件的事件前和事件后数据的系统和方法。 实时数据被捕获并存储在第一存储器的段中的连续循环中。 在检测到指定的事件时，第二存储器被通电并且事件后数据被存储到第二存储器的段。 在指定的数据捕获窗口之后，第二存储器被关闭并且实时数据被捕获在第一存储器的未使用的段中。 事件后数据可以被捕获在第一存储器的未使用段中，并且稍后传送到第二存储器。 自动地址逻辑监视和控制在第一和第二存储器中事件前和事件后的存储和检索。 能量管理系统确定并控制第一和第二存储器的哪些段应该被加电或保持在停滞模式以存储事件数据。
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公开(公告)号：US08549338B2
公开(公告)日：2013-10-01
申请号：US12819550
申请日：2010-06-21
IPC分类号： G06F1/32
CPC分类号： G06F1/3275 , G06F1/3287 , Y02D10/13 , Y02D10/14 , Y02D10/171
摘要： A system and method are disclosed for capturing pre- and post-event data for random events using minimum power. Real-time data is captured and stored in a continuous loop in a segment of a first memory. Upon detection of a designated event, a second memory is powered-on and post-event data is stored to a segment of the second memory. After a designated data capture window, the second memory is powered-off and real-time data is captured in an unused segment of the first memory. The post-event data may be captured in the unused segment of the first memory and later transferred to the second memory. Auto-address logic monitors and controls the storage and retrieval of pre- and post-event in the first and second memory. An energy management system determines and controls which segments of the first and second memory should be powered-on or kept in the stasis mode to store event data.
摘要翻译： 公开了一种用于使用最小功率捕获用于随机事件的事件前和事件后数据的系统和方法。 实时数据被捕获并存储在第一存储器的段中的连续循环中。 在检测到指定的事件时，第二存储器被通电并且事件后数据被存储到第二存储器的段。 在指定的数据捕获窗口之后，第二存储器被关闭并且实时数据被捕获在第一存储器的未使用的段中。 事件后数据可以被捕获在第一存储器的未使用段中，并且稍后传送到第二存储器。 自动地址逻辑监视和控制在第一和第二存储器中事件前和事件后的存储和检索。 能量管理系统确定并控制第一和第二存储器的哪些段应该被加电或保持在停滞模式中以存储事件数据。
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公开(公告)号：US07391241B2
公开(公告)日：2008-06-24
申请号：US11192969
申请日：2005-07-29
CPC分类号： H03K19/00346
摘要： A deglitch circuit utilizes a first flip-flop coupled to the input signal and a second flip-flop coupled to the output of a circuit with feedback from the output to gates to control first and second inputs to the first flip-flop. In an alternative arrangement, a counter is provided between the output of the first flip-flop and the input to the second flip-flop in order to provide flexibility and the possibility of a longer delay for the circuit.
摘要翻译： 去交点电路利用耦合到输入信号的第一触发器和耦合到电路的输出的第二触发器，其具有从输出到门的反馈以控制到第一触发器的第一和第二输入。 在替代方案中，在第一触发器的输出和第二触发器的输入之间提供一个计数器，以提供灵活性以及延迟延迟的可能性。
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公开(公告)号：US07071740B2
公开(公告)日：2006-07-04
申请号：US10951969
申请日：2004-09-28
IPC分类号： H03B1/00
CPC分类号： H03K17/165 , H03K5/1252 , H03K17/0822
摘要： A FET switching transistor for the solenoid coil of an ABS braking system can switched ON or OFF in no more than substantially 250 ns. A higher current biasing circuit for fast turn on of the FET switching transistor is disconnected when it is necessary to limit the current flowing therethrough, whether during the inrush current to the solenoid coil or due to a fault in the system. The high speed switching of the FET switching transistor causes ringing of the current through the transistor which causes the current detector circuit to exit the current control mode. A deglitch circuit prevents the current detector from exiting the current control mode, so that a timer can be used to turn off the FET switching transistor before it can be damaged by the heat generated during current limit operation.
摘要翻译： 用于ABS制动系统的电磁线圈的FET开关晶体管可以在不超过基本上250ns内接通或断开。 当需要限制流过电流的电流时，不管是在电磁线圈的浪涌电流还是由于系统故障而导致FET开关晶体管快速导通的较高电流偏置电路被断开。 FET开关晶体管的高速开关导致通过晶体管的电流振铃，这导致电流检测器电路退出电流控制模式。 去电阻电路防止电流检测器离开电流控制模式，使得可以使用定时器来在FET开关晶体管在电流限制操作期间产生的热量损坏之前关闭FET开关晶体管。
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公开(公告)号：US06249701B1
公开(公告)日：2001-06-19
申请号：US09250065
申请日：1999-02-12
IPC分类号： A61N1362
CPC分类号： A61N1/3704
摘要： A system and method is provided to view an anatomical structure such as a blood vessel in high contrast with its surrounding tissue. The system and method may be used to produce an image of an anatomical structure using reflected electromagnetic radiation singularly scattered from target tissue. The system and method may also provide same-side illumination and detection of reflected electromagnetic radiation in a convenient integral imaging device. The system and method may also provide helmet mounted imaging technology in a single integral helmet which allows the wearer to view an anatomical structure located within a patient such that the image is continuously oriented according to the orientation of the helmet wearer's head. The system and method may also be used in the performance of venipuncture. The system and method may provide for improved contrast between any anatomical structure and its surrounding tissue for use in any imaging system.
摘要翻译： 提供了一种系统和方法来观察诸如与其周围组织高度对比的血管的解剖结构。 系统和方法可以用于使用从目标组织单独散射的反射电磁辐射来产生解剖结构的图像。 该系统和方法还可以在方便的整体成像装置中提供相同侧照明和反射电磁辐射的检测。 该系统和方法还可以将头盔安装的成像技术提供在单个整体式头盔中，其允许佩戴者观察位于患者体内的解剖结构，使得图像根据头盔佩戴者头部的取向连续定向。 该系统和方法也可用于静脉穿刺的表现。 该系统和方法可提供用于任何成像系统的任何解剖结构及其周围组织之间的改善的对比度。
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