SYSTEM AND METHOD FOR IDENTIFYING AND/OR MEASURING ORIENTATION MISMATCHES BETWEEN STATIONS

    公开(公告)号:US20170085375A1

    公开(公告)日:2017-03-23

    申请号:US15310625

    申请日:2015-05-12

    IPC分类号: H04L9/08 G09C1/00

    CPC分类号: H04L9/0852 G09C1/00

    摘要: This disclosure relates to a method and system implementing same for identifying and/or measuring an orientation mismatch and/or relative angular velocity between at least two spaced apart stations, the first and second stations having first and second reference frames, respectively, as well as a method and system implementing same for aligning reference frames. The method comprises receiving, at the second station, a reference signal from the first station, the reference signal having a predetermined coding associated with the first reference frame, and splitting the signal into first and second components with respect to the second reference frame by way of an optical device. The method then comprises measuring first and second intensities of the first and second components, and using the measured first and second intensities to determine an approximate angle of deviation, if any, between first and second reference frames. The determined angle may be used to correct the deviation.

    A MULTIPLE RANK MODULATION SYSTEM
    6.
    发明申请

    公开(公告)号:US20180269944A1

    公开(公告)日:2018-09-20

    申请号:US15756564

    申请日:2016-08-19

    IPC分类号: H04B7/06

    CPC分类号: H04B7/0608 H04B7/0691

    摘要: A system and method for multiple rank modulation transmission in a Multiple-Input Multiple-Output (MIMO) or Multiple-Input Single-Output (MISO) system is provided. The method includes receiving at a transmitter, a signal with a plurality of bits and separating the received signal into a rank index bit block and a signal modulation bit block. The signal modulation bit block is encoded in a signal modulation scheme for transmission. The rank index bit block is used to select a rank to be activated, wherein the activated rank contains at least one active transmitter antenna and the encoded signal modulation bit block is transmitted via the activated rank being at least one activated transmitter antenna. The transmitted encoded signal modulation bit block is received via the receive antenna and a receiver a rank index and a transmitted symbol estimated from the received signal. The signal modulation bit block is finally decoded.

    Receive decorrelator for a wireless communications system

    公开(公告)号:US10224998B2

    公开(公告)日:2019-03-05

    申请号:US15740361

    申请日:2016-06-27

    IPC分类号: H04B7/08

    摘要: This invention relates to decorrelation of signals in order to improve coding gains of wireless communications. To this end a branch signal processor includes a summer to determine a sum of a first branch signal and a second branch signal to produce a sum signal. A conjugate swapper to determine a conjugate swap of the first branch signal and a conjugate swap of the second branch signal to produce two swapped signals, wherein the conjugate swapper takes an imaginary part of the first branch signal to become a real part and a real part of the first branch signal to become an imaginary part of a new complex signal which new complex signal becomes a first swapped signal, and wherein the conjugate swapper takes an imaginary part of the second branch signal to become a real part and a real part of the second branch signal to become an imaginary part of a second complex signal which second complex signal becomes a second swapped signal. A differencer determines a difference of the first swapped branch signal and the second swapped branch signal to produce a difference signal and a diversity combiner configured to combine the sum signal, the first branch signal, the second branch signal and the difference signal.

    Space time labelling technique for wireless communication systems

    公开(公告)号:US10171205B2

    公开(公告)日:2019-01-01

    申请号:US15740364

    申请日:2016-06-28

    摘要: A space time labelling technique for wireless communication systems is provided. A transmitter for implementing the technique includes a first bit mapper and a second bit mapper which is different to the first bit mapper and first and second transmitters. A processor is connected to the first and second mappers and the first and second transmitters and controls these to receive two bit streams and simultaneously feed these into the first mapper and the second mapper. The first mapper maps these into first and second mapped bit streams and the second mapper maps these into third and fourth mapped bit streams which are different from the first and second mapper bit streams. The first mapped bit stream is transmitted in a first time slot via the first transmitter and the second mapped bit stream is transmitted in the first time slot via the second transmitter. The third mapped bit stream is transmitted in a second time slot via the second transmitter and finally the fourth mapped bit stream is transmitted in a second time slot via the first transmitter.