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    METHOD TO MANUFACTURE LDMOS TRANSISTORS WITH IMPROVED THRESHOLD VOLTAGE CONTROL
    2.
    发明申请
    METHOD TO MANUFACTURE LDMOS TRANSISTORS WITH IMPROVED THRESHOLD VOLTAGE CONTROL 有权
    用改进的阈值电压控制制造LDMOS晶体管的方法

    公开(公告)号：US20070048952A1

    公开(公告)日：2007-03-01

    申请号：US11552198

    申请日：2006-10-24

    申请人： Binghua Hu ,  Howard Lee ,  Henry Edwards ,  John Lin ,  Vladimir Bolkhovsky

    发明人： Binghua Hu ,  Howard Lee ,  Henry Edwards ,  John Lin ,  Vladimir Bolkhovsky

    IPC分类号： H01L21/336

    CPC分类号： H01L21/266 ,  H01L21/2652 ,  H01L29/1095 ,  H01L29/42368 ,  H01L29/66681 ,  H01L29/7816

    摘要： A double diffused region (65), (75), (85) is formed in an epitaxial layer (20). The double diffused region is formed by first implanting light implant specie such as boron through an opening in a photoresist layer prior to a hard bake process. Subsequent to a hard bake process heavy implant specie such as arsenic can be implanted into the epitaxial layer. During subsequent processing such as LOCOS formation the double diffused region is formed. A dielectric layer (120) is formed on the epitaxial layer (20) and gate structures (130), (135) are formed over the dielectric layer (120).

    摘要翻译： 在外延层（20）中形成双扩散区域（65），（75），（85）。 通过在硬烘烤过程之前首先将诸如硼的光注入物质在光致抗蚀剂层中的开口注入，形成双扩散区域。 在硬烘烤过程之后，可以将诸如砷的重植入物种植入外延层中。 在后续处理（如LOCOS形成）中形成双扩散区。 在外延层（20）上形成介电层（120），并且在电介质层（120）之上形成栅极结构（130），（135）。

    Bladed silicon-on-insulator semiconductor devices and method of making
    3.
    发明授权
    Bladed silicon-on-insulator semiconductor devices and method of making 有权
    刀片绝缘体上半导体器件及其制造方法

    公开(公告)号：US06800917B2

    公开(公告)日：2004-10-05

    申请号：US10321423

    申请日：2002-12-17

    申请人： Sheldon D. Haynie ,  Steven L. Merchant ,  Sameer P. Pendharkar ,  Vladimir Bolkhovsky

    发明人： Sheldon D. Haynie ,  Steven L. Merchant ,  Sameer P. Pendharkar ,  Vladimir Bolkhovsky

    IPC分类号： H01L2176

    CPC分类号： H01L29/66681 ,  H01L29/0657 ,  H01L29/4175 ,  H01L29/66674 ,  H01L29/66772 ,  H01L29/7824 ,  H01L29/78624 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor device includes an elongated, blade-shaped semiconductor element isolated from a surrounding region of a semiconductor substrate by buried and side oxide layers. A polysilicon post disposed at one end of the element has a bottom portion extending through the buried oxide to contact the substrate, providing for electrical and thermal coupling between the element and the substrate and for gettering impurities during processing. A device fabrication process employs a selective silicon-on-insulator (SOI) technique including forming trenches in the substrate; passivating the upper portion of the element; and performing a long oxidation to create the buried oxide layer. A second oxidation is used to create an insulating oxide layer on the sidewalls of the semiconductor element, and polysilicon material is used to fill the trenches and to create the post. The process can be used with conventional bulk silicon wafers and processes, and the blade devices can be integrated with conventional planar devices formed on other areas of the wafer.

    摘要翻译： 半导体器件包括通过掩埋和侧面氧化物层与半导体衬底的周围区域隔离的细长的刀片状半导体元件。 设置在元件的一端的多晶硅柱具有延伸穿过掩埋氧化物的底部部分以接触基板，从而提供元件和基板之间的电和热耦合以及在处理期间吸杂杂质。 器件制造工艺采用选择性绝缘体上硅（SOI）技术，包括在衬底中形成沟槽; 钝化元件的上部; 并进行长时间氧化以形成掩埋氧化物层。 使用第二氧化在半导体元件的侧壁上产生绝缘氧化物层，并且使用多晶硅材料填充沟槽并形成柱。 该方法可以与传统的体硅晶片和工艺一起使用，并且刀片装置可以与形成在晶片的其它区域上的常规平面装置集成。