Arrangement for growing a thin dielectric layer on a semiconductor wafer
at low temperatures
    2.
    发明授权
    Arrangement for growing a thin dielectric layer on a semiconductor wafer at low temperatures 失效
    用于在低温下在半导体晶片上生长薄介电层的布置

    公开(公告)号:US5861190A

    公开(公告)日:1999-01-19

    申请号:US621410

    申请日:1996-03-25

    CPC分类号: H01L21/3144 C23C8/28

    摘要: A process of growing a dielectric layer includes a step of heating a gas mixture of at least one gas having a first chemical element of oxygen and a second chemical element other than oxygen to a first predetermined temperature to produce reactive precursors of the gas mixture. The reactive precursors are then introduced into a reaction chamber that houses at least one wafer to grow the dielectric layer on the wafer within the reaction chamber at a second predetermined temperature below the first predetermined temperature. A semiconductor manufacturing apparatus of growing the dielectric layer is also described.

    摘要翻译: 生长介电层的工艺包括将至少一种具有氧的第一化学元素的气体和除氧以外的第二化学元素的气体混合物加热到第一预定温度以产生气体混合物的反应性前体的步骤。 然后将反应性前体引入到容纳至少一个晶片的反应室中,以在低于第一预定温度的第二预定温度下在反应室内的晶片上生长电介质层。 还描述了用于生长介电层的半导体制造装置。

    Local oxidation of a sidewall sealed shallow trench for providing isolation between devices of a substrate
    3.
    发明授权
    Local oxidation of a sidewall sealed shallow trench for providing isolation between devices of a substrate 失效
    侧壁密封的浅沟槽的局部氧化,用于在衬底的器件之间提供隔离

    公开(公告)号:US06765280B1

    公开(公告)日:2004-07-20

    申请号:US09217740

    申请日:1998-12-21

    IPC分类号: H01L2900

    CPC分类号: H01L21/76232

    摘要: A semiconductor isolation structure. The semiconductor isolation structure includes a substrate. A first device and a second device are formed within the substrate. An isolation region is formed within the substrate between the first device and the second device. The isolation region includes a deep region which extends into the substrate. The deep region includes a deep region cross-sectional area. A shallow region extends to the surface of the substrate. The shallow region includes a shallow region cross-sectional area. The deep region cross-sectional area is greater than the shallow region cross-sectional area. For an alternate embodiment, the deep region includes an oxide and the shallow region includes a protective wall. The protective wall can be formed from an oxide and a nitride.

    摘要翻译: 半导体隔离结构。 半导体隔离结构包括基板。 第一器件和第二器件形成在衬底内。 在第一装置和第二装置之间的衬底内形成隔离区。 隔离区域包括延伸到衬底中的深区域。 深区域包括深区域横截面积。 浅区域延伸到基板的表面。 浅区域包括浅区域横截面积。 深区域横截面积大于浅区域横截面积。 对于替代实施例,深区域包括氧化物,浅区域包括保护壁。 保护壁可以由氧化物和氮化物形成。

    Random access memory integrated with CMOS sensors
    4.
    发明授权
    Random access memory integrated with CMOS sensors 有权
    与CMOS传感器集成的随机存取存储器

    公开(公告)号:US06529240B2

    公开(公告)日:2003-03-04

    申请号:US09442650

    申请日:1999-11-18

    IPC分类号: H04N314

    CPC分类号: H04N5/3355 H04N5/37455

    摘要: An imaging device includes a Gray Code generator and an array of pixels. Each pixel includes a complimentary metal oxide semiconductor (“CMOS”) sensor, a comparator and random access memory (e.g., ferroelectric random access memory). The Gray Code generator is started at the beginning of capture mode and begins providing a sequence of code words. Within each pixel, an output of a CMOS sensor is compared to a threshold, and a code word in the sequence is stored in random access memory when the sensor output crosses the threshold. Thus, the random access memory of each pixel stores a code word that represents the intensity of light detected by its associated CMOS sensor.

    摘要翻译: 成像装置包括格雷码发生器和像素阵列。 每个像素包括互补金属氧化物半导体(“CMOS”)传感器,比较器和随机存取存储器(例如,铁电随机存取存储器)。 格雷码发生器在捕获模式开始时启动,并开始提供一系列代码字。 在每个像素内,将CMOS传感器的输出与阈值进行比较,并且当传感器输出超过阈值时,序列中的代码字被存储在随机存取存储器中。 因此,每个像素的随机存取存储器存储表示由其相关联的CMOS传感器检测到的光的强度的码字。

    Conductive guard rings for elevated active pixel sensors
    5.
    发明授权
    Conductive guard rings for elevated active pixel sensors 有权
    导电保护环用于升高的有源像素传感器

    公开(公告)号:US06229191B1

    公开(公告)日:2001-05-08

    申请号:US09443960

    申请日:1999-11-19

    IPC分类号: H01L310376

    CPC分类号: H01L27/14643 H01L27/14632

    摘要: An array of active pixel sensors. The array of active pixel sensors includes a substrate that includes electronic circuitry. An interconnect structure is formed adjacent to the substrate. The interconnect structure includes a plurality of conductive vias. A plurality of conductive guard rings are formed adjacent to the interconnect structure. Each conductive guard ring is electrically connected to the substrate through at least one of the conductive vias. A plurality of photo diode sensors are formed adjacent to the interconnect structure. Each photo diode sensor is surrounded by at least one of the conductive guard rings. Each photo diode sensor includes a pixel electrode. The pixel electrode is electrically connected to the substrate through a corresponding conductive via. An I-layer is formed adjacent to the pixel electrode. The array of active pixel sensors further includes a transparent conductive layer formed adjacent to the photo diode sensors. An inner surface of the conductive layer is physically connected to the photo diode sensors, and electrically connected to the substrate through a conductive via. The electronic circuitry biases the photo diode sensors and controls a guard voltage potential of the conductive guard rings.

    摘要翻译: 一组有源像素传感器。 有源像素传感器的阵列包括包括电子电路的衬底。 在衬底附近形成互连结构。 互连结构包括多个导电通孔。 在互连结构附近形成多个导电保护环。 每个导电保护环通过至少一个导电通孔与衬底电连接。 在互连结构附近形成多个光电二极管传感器。 每个光电二极管传感器被至少一个导电保护环包围。 每个光电二极管传感器包括像素电极。 像素电极通过相应的导电通孔电连接到衬底。 在像素电极附近形成I层。 有源像素传感器阵列还包括邻近光电二极管传感器形成的透明导电层。 导电层的内表面物理地连接到光电二极管传感器,并且通过导电通孔与衬底电连接。 电子电路偏置光电二极管传感器并控制导电保护环的保护电压电位。