Interlayer dielectric for passivation of an elevated integrated circuit
sensor structure
    3.
    发明授权
    Interlayer dielectric for passivation of an elevated integrated circuit sensor structure 有权
    用于钝化升高的集成电路传感器结构的层间电介质

    公开(公告)号:US6051867A

    公开(公告)日:2000-04-18

    申请号:US306238

    申请日:1999-05-06

    CPC分类号: H01L27/14601 H01L31/02005

    摘要: An integrated circuit sensor structure. The integrated circuit sensor structure includes a substrate which includes electronic circuitry. An interconnect structure is adjacent to the substrate. The interconnect structure includes conductive interconnect vias which pass through the interconnect structure. A dielectric layer is adjacent to the interconnect structure. The dielectric layer includes a planar surface, and conductive dielectric vias which pass through the dielectric layer and are electrically connected to the interconnect vias. The dielectric layer further includes an interlayer planarization dielectric layer adjacent to the interconnect structure, and a passivating layer adjacent to the interlayer planarization dielectric layer. The integrated circuit sensor structure further includes sensors adjacent to the dielectric layer. The interconnect vias and the dielectric vias electrically connect the electronic circuitry to the sensors.

    摘要翻译: 集成电路传感器结构。 集成电路传感器结构包括包括电子电路的基板。 互连结构与衬底相邻。 互连结构包括通过互连结构的导电互连通孔。 电介质层与互连结构相邻。 电介质层包括平坦表面和穿过电介质层并电连接到互连通孔的导电电介质通孔。 电介质层还包括与互连结构相邻的层间平坦化介电层和与层间平坦化介电层相邻的钝化层。 集成电路传感器结构还包括与电介质层相邻的传感器。 互连通孔和电介质通孔将电子电路电连接到传感器。

    Multiple color detection elevated pin photo diode active pixel sensor
    5.
    发明授权
    Multiple color detection elevated pin photo diode active pixel sensor 有权
    多色检测提升引脚光电二极管有源像素传感器

    公开(公告)号:US06111300A

    公开(公告)日:2000-08-29

    申请号:US203445

    申请日:1998-12-01

    CPC分类号: H01L27/14609 H01L27/14647

    摘要: A color detection active pixel sensor. The color detection active pixel sensor includes a substrate. A diode is electrically connected to a first doped region of the substrate. The diode conducts charge when the diode receives photons having a first range of wavelengths. The substrate includes a second doped region. The second doped region conducts charge when receiving photons having a second range of wavelengths. The photons having the second range of wavelengths passing through the diode substantially undetected by the diode. The substrate can include a doped well within the substrate. The doped well conducts charge when receiving photons having a third range of wavelengths. The photons having the third range of wavelengths pass through the diode substantially undetected by the diode.

    摘要翻译: 颜色检测有源像素传感器。 颜色检测有源像素传感器包括基板。 二极管电连接到衬底的第一掺杂区域。 当二极管接收具有第一波长范围的光子时,二极管导通电荷。 衬底包括第二掺杂区域。 当接收具有第二波长范围的光子时,第二掺杂区域传导电荷。 具有基本上不被二极管检测到的通过二极管的第二波长范围的光子。 衬底可以包括衬底内的掺杂阱。 当接收具有第三波长范围的光子时,掺杂阱导电。 具有第三波长范围的光子通过基本上不被二极管检测的二极管。

    Photo diode pixel sensor array having a guard ring
    6.
    发明授权
    Photo diode pixel sensor array having a guard ring 有权
    具有保护环的光电二极管像素传感器阵列

    公开(公告)号:US06545711B1

    公开(公告)日:2003-04-08

    申请号:US09184426

    申请日:1998-11-02

    IPC分类号: H04N5335

    CPC分类号: H01L27/14603

    摘要: An image sensor array. The image sensor array includes a substrate. An array of photo diode sensors are electrically interconnected to the substrate. The photo diode sensors conduct charge at a rate proportional to the intensity of light received by the photo diode sensors. A ring of guard diodes are located around the periphery of the array of photo diode sensors. Each guard diode has a guard diode anode connected to a predetermined guard anode voltage and a guard diode cathode connected to a static guard cathode voltage.

    摘要翻译: 图像传感器阵列。 图像传感器阵列包括基板。 一组光电二极管传感器与衬底电互连。 光电二极管传感器以与光电二极管传感器接收的光强成比例的速率传导电荷。 保护二极管环位于光电二极管传感器阵列周围的周围。 每个保护二极管具有连接到预定保护阳极电压的保护二极管阳极和连接到静态保护阴极电压的保护二极管阴极。

    Method of making active matrix display
    7.
    发明授权
    Method of making active matrix display 失效
    制作有源矩阵显示的方法

    公开(公告)号:US07248306B2

    公开(公告)日:2007-07-24

    申请号:US10897533

    申请日:2004-07-23

    IPC分类号: G02F1/136

    摘要: A method of making a lower cost active matrix display. In a particular embodiment, the method includes providing at least one first conductor upon a substrate and depositing a gate dielectric upon the first conductor and substrate. At least one paired second conductor and a pixel electrode are deposited upon the gate dielectric, with the second conductor crossing the first conductor and with a narrow gap between the paired second conductor and the pixel electrode. A semiconductor material is deposited over the paired second conductor and pixel electrode, filling the narrow gap. The narrow gap shelters a portion of the semiconductor material, which serves as a semiconductor bridge capable of functioning either as an insulator or as a channel region of a field effect transistor. The remaining, unsheltered semiconductor material is removed. A liquid crystal layer is then deposited upon the paired second conductor, the pixel electrode and the sheltered semiconductor material, and a translucent conductor is deposited upon the liquid crystal display layer. An associated display is also provided.

    摘要翻译: 制作成本较低的有源矩阵显示的方法。 在特定实施例中,该方法包括在衬底上提供至少一个第一导体并在第一导体和衬底上沉积栅极电介质。 至少一对成对的第二导体和像素电极沉积在栅极电介质上,其中第二导体与第一导体交叉并且在成对的第二导体和像素电极之间具有窄间隙。 半导体材料沉积在成对的第二导体和像素电极上,填充窄间隙。 窄间隙避开半导体材料的一部分,其用作能够用作场效应晶体管的绝缘体或沟道区的半导体桥。 剩余的未加帽的半导体材料被去除。 然后将液晶层沉积在成对的第二导体,像素电极和遮蔽半导体材料上,并且半透明导体沉积在液晶显示层上。 还提供了相关联的显示。

    Active interconnects and control points in integrated circuits
    8.
    发明授权
    Active interconnects and control points in integrated circuits 有权
    集成电路中的有源互连和控制点

    公开(公告)号:US07242199B2

    公开(公告)日:2007-07-10

    申请号:US11112795

    申请日:2005-04-21

    IPC分类号: G01R27/08

    摘要: In various embodiments of the present invention, tunable resistors are introduced at the interconnect layer of integrated circuits in order to provide a for adjusting internal voltage and/or current levels within the integrated circuit to repair defective components or to configure the integrated circuit following manufacture. For example, when certain internal components, such as transistors, do not have specified electronic characteristics due to manufacturing defects, adjustment of the variable resistances of the tunable resistors included in the interconnect layer of integrated circuits according to embodiments of the present invention can be used to adjust internal voltage and/or levels in order to ameliorate the defective components. In other cases, the tunable resistors may be used as switches to configure integrated circuit components, including individual transistors and logic gates as well as larger, hierarchically structured functional modules and domains.

    摘要翻译: 在本发明的各种实施例中,在集成电路的互连层处引入可调电阻器,以便提供用于调整集成电路内的内部电压和/或电流水平以修复有缺陷的部件或者在制造之后配置集成电路。 例如,当诸如晶体管的某些内部组件由于制造缺陷而没有指定的电子特性时,可以使用根据本发明的实施例的集成电路的互连层中包括的可调谐电阻的可变电阻的调整 以调整内部电压和/或电平以便改善有缺陷的部件。 在其他情况下,可调谐电阻器可以用作开关以配置集成电路部件,包括单独的晶体管和逻辑门以及更大的分层结构的功能模块和域。

    Series diode thermally assisted MRAM
    9.
    发明授权
    Series diode thermally assisted MRAM 有权
    串联二极管热辅助MRAM

    公开(公告)号:US07180770B2

    公开(公告)日:2007-02-20

    申请号:US11089688

    申请日:2005-03-24

    IPC分类号: G11C11/02

    CPC分类号: G11C11/16 G11C11/1675

    摘要: An information storage device is provided. The information storage device may be a magnetic random access memory (MRAM) device including a resistive cross point array of spin dependent tunneling (SDT) junctions or magnetic memory elements, with word lines extending along rows of the SDT junctions and bit lines extending along the columns of the SDT junctions. The present design includes a plurality of heating elements connected in series with associated magnetic memory elements, each heating element comprising a diode. Voltage applied to a magnetic memory element and associated heating element causes reverse current to flow through the diode, thereby producing heat from the diode and heating the magnetic memory element, thereby facilitating the write function of the device.

    摘要翻译: 提供信息存储装置。 信息存储装置可以是包括自旋相关隧道(SDT)结或磁存储元件的电阻交叉点阵列的磁性随机存取存储器(MRAM)装置,其中字线沿着沿着SDT结的行和沿着 SDT路口的列。 本设计包括与相关联的磁存储元件串联连接的多个加热元件,每个加热元件包括二极管。 施加到磁存储元件和相关联的加热元件的电压导致反向电流流过二极管,从而从二极管产生热量并加热磁存储元件,从而有助于器件的写入功能。

    Selecting a magnetic memory cell write current
    10.
    发明授权
    Selecting a magnetic memory cell write current 有权
    选择磁存储单元写入电流

    公开(公告)号:US07145797B2

    公开(公告)日:2006-12-05

    申请号:US11003904

    申请日:2004-12-03

    IPC分类号: G11C11/00

    CPC分类号: G11C11/16

    摘要: The invention includes an apparatus and method for selecting a desirable magnitude of a magnetic memory cell write current. The method includes determining a minimal magnitude of write current for writing to the magnetic memory cell, determining a maximal magnitude of write current for writing to the magnetic memory cell, and calculating the selected magnitude of magnetic memory cell write current based on the minimal magnitude of write current and the maximal magnitude of write current.

    摘要翻译: 本发明包括用于选择磁存储单元写入电流的期望幅度的装置和方法。 该方法包括确定用于写入磁存储器单元的写入电流的最小幅度,确定用于写入磁存储单元的写入电流的最大幅度,以及基于最小幅度来计算所选择的磁存储单元写入电流的大小 写入电流和写入电流的最大幅度。