公开(公告)号：US06596654B1

公开(公告)日：2003-07-22

申请号：US09996619

申请日：2001-11-28

Applicant: Atiye Bayman ,  Md Sazzadur Rahman ,  Weijie Zhang ,  Bart van Schravendijk ,  Vishal Gauri ,  George D. Papasoulitotis ,  Vikram Singh

Inventor： Atiye Bayman ,  Md Sazzadur Rahman ,  Weijie Zhang ,  Bart van Schravendijk ,  Vishal Gauri ,  George D. Papasoulitotis ,  Vikram Singh

IPC: H01L2131

CPC classification number: H01L21/02129 ,  C23C16/045 ,  C23C16/402 ,  H01J2237/3327 ,  H01L21/02131 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/3144 ,  H01L21/3145 ,  H01L21/31608 ,  H01L21/31625 ,  H01L21/31629 ,  H01L21/76224

Abstract: Chemical vapor deposition processes are employed to fill high aspect ratio (typically at least 3:1), narrow width (typically 1.5 microns or less and even sub 0.15 micron) gaps with significantly reduced incidence of voids or weak spots. This deposition process involves the use of hydrogen as a process gas in the reactive mixture of a plasma containing CVD reactor. The process gas also includes dielectric forming precursor molecules such as silicon and oxygen containing molecules.

Abstract translation: 使用化学气相沉积方法来填充高纵横比（通常至少3:1），窄宽度（通常为1.5微米或更小甚至0.15微米以下）间隙，空隙或弱点的发生率显着降低。 该沉积工艺涉及在含等离子体CVD反应器的反应混合物中使用氢作为工艺气体。 工艺气体还包括电介质形成前体分子，例如硅和含氧分子。

公开(公告)号：US20080102644A1

公开(公告)日：2008-05-01

申请号：US11554709

申请日：2006-10-31

Applicant: Haruhiro Harry GOTO ,  Weijie ZHANG ,  David CHEUNG

Inventor： Haruhiro Harry GOTO ,  Weijie ZHANG ,  David CHEUNG

IPC: H01L21/302

CPC classification number: G03F7/427

Abstract: Methods for removing photoresist from a semiconductor substrate are provided. In accordance with an exemplary embodiment of the invention, a method for removing a photoresist from a semiconductor substrate comprises the steps of exposing the semiconductor substrate and the photoresist to a first plasma formed from oxygen, forming an oxide layer on exposed regions of the semiconductor substrate, and subjecting the photoresist to a second plasma formed from oxygen and a fluorine-comprising gas, wherein the first plasma is not the second plasma.

Abstract translation: 提供了从半导体衬底去除光致抗蚀剂的方法。 根据本发明的示例性实施例，从半导体衬底去除光致抗蚀剂的方法包括以下步骤：将半导体衬底和光致抗蚀剂暴露于由氧形成的第一等离子体，在半导体衬底的暴露区域上形成氧化物层 并且对所述光致抗蚀剂进行由氧和含氟气体形成的第二等离子体，其中所述第一等离子体不是所述第二等离子体。

公开(公告)号：US07217658B1

公开(公告)日：2007-05-15

申请号：US10935909

申请日：2004-09-07

Applicant: Atiye Bayman ,  George D. Papasouliotis ,  Yong Ling ,  Weijie Zhang ,  Vishal Gauri ,  Mayasari Lim

Inventor： Atiye Bayman ,  George D. Papasouliotis ,  Yong Ling ,  Weijie Zhang ,  Vishal Gauri ,  Mayasari Lim

IPC: H01L21/44

CPC classification number: H01L21/76837 ,  C23C16/045 ,  C23C16/402 ,  H01L21/02129 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/3144 ,  H01L21/31612 ,  H01L21/31625 ,  H01L21/31629 ,  H01L21/31633

Abstract: High density plasma chemical vapor deposition and etch back processes fill high aspect ratio gaps without liner erosion or further underlying structure attack. The characteristics of the deposition process are modulated such that the deposition component of the process initially dominates the sputter component of the process. For example, reactive gasses are introduced in a gradient fashion into the HDP reactor and introduction of bias power onto the substrate is delayed and gradually increased or reactor pressure is decreased. In the case of a multi-step etch enhanced gap fill process, the invention may involve gradually modulating deposition and etch components during transitions between process steps. By carefully controlling the transitions between process steps, including the introduction of reactive species into the HDP reactor and the application of source and bias power onto the substrate, structure erosion is prevented.

Abstract translation: 高密度等离子体化学气相沉积和回蚀工艺可以填充高纵横比间隙，无需衬垫侵蚀或进一步的基础结构攻击。 调制沉积工艺的特性使得该工艺的沉积组分最初主导该工艺的溅射部件。 例如，反应性气体以梯度方式引入HDP反应器中，并且将偏置功率引入到衬底上被延迟并逐渐增加或反应器压力降低。 在多步骤蚀刻增强的间隙填充工艺的情况下，本发明可以涉及在工艺步骤之间的过渡期间逐渐调制沉积和蚀刻部件。 通过仔细控制工艺步骤之间的转变，包括将活性物质引入HDP反应器中，以及将源和偏置功率施加到衬底上，防止结构侵蚀。

公开(公告)号：US07067440B1

公开(公告)日：2006-06-27

申请号：US10890655

申请日：2004-07-13

Applicant: Atiye Bayman ,  Md Sazzadur Rahman ,  Weijie Zhang ,  Bart van Schravendijk ,  Vishal Gauri ,  George D. Papasouliotis ,  Vikram Singh

Inventor： Atiye Bayman ,  Md Sazzadur Rahman ,  Weijie Zhang ,  Bart van Schravendijk ,  Vishal Gauri ,  George D. Papasouliotis ,  Vikram Singh

IPC: H01L21/00

CPC classification number: C23C16/401 ,  C23C16/045

Abstract: Chemical vapor deposition processes are employed to fill high aspect ratio (typically at least 3:1), narrow width (typically 1.5 microns or less and even sub 0.15 micron) gaps with significantly reduced incidence of voids or weak spots. This deposition process involves the use of hydrogen as a process gas in the reactive mixture of a plasma containing CVD reactor. The process gas also includes dielectric forming precursor molecules such as silicon and oxygen containing molecules.

公开(公告)号：US06787483B1

公开(公告)日：2004-09-07

申请号：US10442846

申请日：2003-05-20

Applicant: Atiye Bayman ,  Md Sazzadur Rahman ,  Weijie Zhang ,  Bart van Schravendijk ,  Vishal Gauri ,  George D. Papasoulitotis ,  Vikram Singh

Inventor： Atiye Bayman ,  Md Sazzadur Rahman ,  Weijie Zhang ,  Bart van Schravendijk ,  Vishal Gauri ,  George D. Papasoulitotis ,  Vikram Singh

IPC: H01L2131

CPC classification number: H01L21/02129 ,  C23C16/045 ,  C23C16/402 ,  H01J2237/3327 ,  H01L21/02131 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/3144 ,  H01L21/3145 ,  H01L21/31608 ,  H01L21/31625 ,  H01L21/31629 ,  H01L21/76224

Abstract: Chemical vapor deposition processes are employed to fill high aspect ratio (typically at least 3:1), narrow width (typically 1.5 microns or less and even sub 0.15 micron) gaps with significantly reduced incidence of voids or weak spots. This deposition process involves the use of hydrogen as a process gas in the reactive mixture of a plasma containing CVD reactor. The process gas also includes dielectric forming precursor molecules such as silicon and oxygen containing molecules.

Abstract translation: 使用化学气相沉积方法来填充高纵横比（通常至少3:1），窄宽度（通常为1.5微米或更小甚至0.15微米以下）间隙，空隙或弱点的发生率显着降低。 该沉积工艺涉及在含等离子体CVD反应器的反应混合物中使用氢作为工艺气体。 工艺气体还包括电介质形成前体分子，例如硅和含氧分子。