公开(公告)号：US20120223767A1

公开(公告)日：2012-09-06

申请号：US13409408

申请日：2012-03-01

申请人： Wen-Tai Wang ,  Chao-Yen Huang

发明人： Wen-Tai Wang ,  Chao-Yen Huang

IPC分类号： H03K5/00

CPC分类号： H03K17/08104 ,  H03K19/00315 ,  H03K19/00361

摘要： A two-stage post driver circuit includes a controlling circuit, a pull-up unit and a pull-down unit. A first N-type transistor of the pull-down unit and a first P-type transistor of the pull-up unit are both connected to an output pad. The controlling circuit is used for controlling the first N-type transistor and the first P-type transistor. Consequently, when the pull-up unit or the pull-down unit is turned on, the voltage difference between the drain terminal and the source terminal of the first N-type transistor or the first P-type transistor is lower than a voltage stress.

摘要翻译： 两级后驱动电路包括控制电路，上拉单元和下拉单元。 下拉单元的第一N型晶体管和上拉单元的第一P型晶体管都连接到输出焊盘。 控制电路用于控制第一N型晶体管和第一P型晶体管。 因此，当上拉单元或下拉单元接通时，第一N型晶体管或第一P型晶体管的漏极端子和源极端子之间的电压差低于电压应力。

公开(公告)号：US20120162832A1

公开(公告)日：2012-06-28

申请号：US12978638

申请日：2010-12-27

申请人： Wen-Tai Wang ,  Ming-Jing Ho

发明人： Wen-Tai Wang ,  Ming-Jing Ho

IPC分类号： H02H9/04

CPC分类号： H01L27/0251 ,  H01L27/0285

摘要： For a multi-powered IC, an ESD protection circuit includes multiple voltage clamping circuits, each configured to provide a path for discharging an ESD transient current associated with a corresponding power supply.

摘要翻译： 对于多功率IC，ESD保护电路包括多个电压钳位电路，每个电压钳位电路被配置为提供用于放电与相应电源相关联的ESD瞬态电流的路径。

公开(公告)号：US06414534B1

公开(公告)日：2002-07-02

申请号：US09784819

申请日：2001-02-20

申请人： Wen-Tai Wang ,  Chung-Hui Chen

发明人： Wen-Tai Wang ,  Chung-Hui Chen

IPC分类号： H03L500

CPC分类号： H03K3/012 ,  H03K3/356113 ,  H03K3/356182

摘要： New level shifting circuits, one using dynamic current compensation and one using dynamic voltage equalization, are described. An input swings between a low supply and ground. An output swings between a high supply and ground. An inverter input is connected to the input of the level shifting circuit to form an inverted level shifting input. A first NMOS transistor has the gate tied to the level shifting input and the source tied to ground. A first PMOS transistor has the gate tied to the level shifting output, the source tied to the high supply, and the drain tied to the first NMOS drain. A second NMOS transistor has the gate tied to the inverted level shifter input, the source tied to the ground, and the drain tied to the level shifting output. A second PMOS transistor has the gate tied to the first NMOS drain, the source tied to the high supply, and the drain is tied to the level shifting output. A third NMOS transistor has the gate tied to the first NMOS drain, v source tied to the level shifting input, and the drain tied to the level shifting output. A fourth NMOS transistor has the gate tied to the second NMOS drain, the source tied to the inverted level shifting input, and the drain tied to the first NMOS drain.

公开(公告)号：US08724269B2

公开(公告)日：2014-05-13

申请号：US13352724

申请日：2012-01-18

申请人： Wen-Tai Wang ,  Sheng-Tsai Huang ,  Chao-Yen Huang

发明人： Wen-Tai Wang ,  Sheng-Tsai Huang ,  Chao-Yen Huang

IPC分类号： H02H9/04

CPC分类号： H02H9/046

摘要： ESD protection circuit is provided, which includes a detection circuit, a trigger circuit and a clamp circuit. The detection circuit includes two stacked capacitors reflecting occurrence of ESD events. The trigger circuit includes three stacked transistors controlling triggering of the clamp circuit according to operation of the detection circuit. The clamp circuit includes two stacked transistors conducting ESD path when triggered.

摘要翻译： 提供ESD保护电路，其包括检测电路，触发电路和钳位电路。 检测电路包括反映ESD事件发生的两个堆叠电容器。 触发电路包括根据检测电路的操作控制钳位电路触发的三个堆叠晶体管。 钳位电路包括触发时导通ESD路径的两个堆叠晶体管。

公开(公告)号：US08537513B2

公开(公告)日：2013-09-17

申请号：US12978622

申请日：2010-12-26

申请人： Wen-Tai Wang ,  Ming-Jing Ho

发明人： Wen-Tai Wang ,  Ming-Jing Ho

IPC分类号： H02H9/00

CPC分类号： H01L27/0251

摘要： For a negative-powered IC, an ESD protection circuit includes a negative voltage clamping circuit configured to provide a path for discharging ESD transient currents associated with different negative power supplies of the IC.

摘要翻译： 对于负电源IC，ESD保护电路包括负电压钳位电路，其被配置为提供用于放电与IC的不同负电源相关联的ESD瞬态电流的路径。

公开(公告)号：US20120223759A1

公开(公告)日：2012-09-06

申请号：US13409304

申请日：2012-03-01

申请人： Wen-Tai Wang ,  Sheng-Tsai Huang ,  Chao-Yen Huang

发明人： Wen-Tai Wang ,  Sheng-Tsai Huang ,  Chao-Yen Huang

IPC分类号： H03K5/08 ,  H03L5/00

CPC分类号： H03K19/018521

摘要： A receiver circuit is provided which receives an external signal of high voltage and provides a corresponding internal signal of low voltage. The receiver circuit includes a voltage limiter, a level down shifter and an inverter of low operation voltage. The level down shifter has a front node and a back node, and includes a transistor with a gate and a source respectively coupled to the voltage limiter and the inverter at the front node and the back node. The voltage limiter limits level of the external signal transmitted to the front node, the level down shifter shifts down a signal of the front node by a cross voltage to generate a signal of the back node, and the inverter inverts the signal of the back node to generate the internal signal.

摘要翻译： 提供接收高电压的外部信号并提供相应的低电压内部信号的接收器电路。 接收器电路包括电压限制器，电平转换器和低工作电压的逆变器。 电平降低移位器具有前端节点和后端节点，并且包括具有分别耦合到限压器的栅极和源极以及前端节点和后节点处的逆变器的晶体管。 电压限制器限制发送到前端节点的外部信号的电平，电平降低位移器将前端节点的信号交叉电压转移，以产生后端节点的信号，并且逆变器反转后节点的信号 以产生内部信号。

公开(公告)号：US20120033335A1

公开(公告)日：2012-02-09

申请号：US12849235

申请日：2010-08-03

申请人： Wen-Tai Wang ,  Fan-yi Jien

发明人： Wen-Tai Wang ,  Fan-yi Jien

IPC分类号： H02H9/04

CPC分类号： H01L23/60 ,  H01L2924/0002 ,  H01L2924/00

摘要： The invention provides systems and methods for ESD protection for an integrated circuit (IC) having multi-power domains. The IC comprises a first device in a first power domain having a first power line and a first ground line and a second device in a second power domain having a second power line and a second ground line. A clamp circuit having a first node and a second node is coupled to the first device and the second device to provide cross-domain protection. Alternatively, two clamp circuits are used to couple with the first device and the second device to provide cross-domain ESD protection.

摘要翻译： 本发明提供了具有多电源域的集成电路（IC）的ESD保护的系统和方法。 该IC包括具有第一电力线和第一接地线的第一电力域中的第一装置和具有第二电力线和第二接地线的第二电力域中的第二装置。 具有第一节点和第二节点的钳位电路耦合到第一设备和第二设备以提供跨域保护。 或者，使用两个钳位电路与第一器件和第二器件耦合以提供跨域ESD保护。

公开(公告)号：US07420393B2

公开(公告)日：2008-09-02

申请号：US11483319

申请日：2006-07-07

申请人： Sheng-Tsai Huang ,  Wen-Tai Wang

发明人： Sheng-Tsai Huang ,  Wen-Tai Wang

IPC分类号： H03K19/0175

CPC分类号： H03K19/018528

摘要： A level shifter includes a first inverter coupled between the second voltage and the first voltage, and a second inverter coupled between the second voltage and the first voltage, the second inverter being cross-coupled with the first inverter for latching a value therein. A first switch module is coupled between a first data storage node of the first and second inverters and an input signal swinging between the first voltage and a ground voltage. A second switch module is coupled between a second data storage node of the first and second inverters and an inverted input signal swinging between the ground voltage and the first voltage. The first and second inverters and the first and second switch modules include one or more MOS transistors with gate oxide layers of the same thickness.

摘要翻译： 电平移位器包括耦合在第二电压和第一电压之间的第一反相器和耦合在第二电压和第一电压之间的第二反相器，第二反相器与第一反相器交叉耦合，用于在其中锁存值。 第一开关模块耦合在第一和第二逆变器的第一数据存储节点与在第一电压和地电压之间摆动的输入信号之间。 第二开关模块耦合在第一和第二反相器的第二数据存储节点和在接地电压和第一电压之间摆动的反相输入信号。 第一和第二反相器以及第一和第二开关模块包括具有相同厚度的栅极氧化物层的一个或多个MOS晶体管。

公开(公告)号：US20080007301A1

公开(公告)日：2008-01-10

申请号：US11483319

申请日：2006-07-07

申请人： Sheng-Tsai Hsin-chu ,  Wen-Tai Wang

发明人： Sheng-Tsai Hsin-chu ,  Wen-Tai Wang

IPC分类号： H03K19/0175

CPC分类号： H03K19/018528

摘要： A level shifter includes a first inverter coupled between the second voltage and the first voltage, and a second inverter coupled between the second voltage and the first voltage, the second inverter being cross-coupled with the first inverter for latching a value therein. A first switch module is coupled between a first data storage node of the first and second inverters and an input signal swinging between the first voltage and a ground voltage. A second switch module is coupled between a second data storage node of the first and second inverters and an inverted input signal swinging between the ground voltage and the first voltage. The first and second inverters and the first and second switch modules include one or more MOS transistors with gate oxide layers of the same thickness.

公开(公告)号：US06949967B2

公开(公告)日：2005-09-27

申请号：US10669515

申请日：2003-09-24

申请人： Wen-Tai Wang ,  Chang-Fen Hu

发明人： Wen-Tai Wang ,  Chang-Fen Hu

IPC分类号： H03B1/00 ,  G06G7/019

CPC分类号： H03J1/0008 ,  H03J2200/10

摘要： A new method to reduce switching noise on an integrated circuit device is achieved. The method comprises providing an integrated circuit device comprising a power supply, a ground, and a plurality of switchable capacitors. Each switchable capacitor is connected from the power supply to ground. The operating mode of the integrated circuit device is tracked. An optimal capacitance value is selected based on the operating mode. A set of switchable capacitors from the plurality of switchable capacitors is selected to thereby connect the optimal capacitance value from the power supply to ground.

摘要翻译： 实现了降低集成电路器件上的开关噪声的新方法。 该方法包括提供包括电源，地和多个可切换电容器的集成电路装置。 每个可切换电容器从电源连接到地。 跟踪集成电路器件的工作模式。 基于操作模式选择最佳电容值。 选择来自多个可切换电容器的一组可切换电容器，从而将来自电源的最佳电容值连接到地。