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1.发明申请公开(公告)号：US20160138968A1
公开(公告)日：2016-05-19
申请号：US14899430
申请日：2013-07-18
CPC分类号： G01J1/42 , G01J3/50 , G09G3/006 , G09G5/10 , G09G2380/08 , G09G2380/10 , G09G2380/12
摘要： The invention provides an apparatus and method for checking the integrity of visual display information and has particular application to checking images displayed in an automotive vehicle, such images containing safety critical information. The image intensity is checked only to an extent commensurate with a human being able to interpret its correct meaning. Hence, images which are defective in some way yet still recognisable by the human eye are not classified as failures. In one embodiment, a part of the image containing safety critical information is segmented into smaller areas and the luminance of pixels in each segmented area is compared with a threshold brightness level and a threshold darkness level. A histogram for each area is generated and compared with a reference.
摘要翻译： 本发明提供一种用于检查视觉显示信息的完整性的装置和方法，并且具有检查在汽车中显示的图像的特定应用，这些图像包含安全关键信息。 检查图像强度仅与人类能够解释其正确含义相当的程度。 因此，以某种方式有缺陷但仍然被人眼识别的图像不被归类为故障。 在一个实施例中，包含安全关键信息的图像的一部分被分割成更小的区域，并且将每个分割区域中的像素的亮度与阈值亮度水平和阈值暗度水平进行比较。 生成每个区域的直方图并与参考进行比较。
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2.发明授权Method for producing emulation circuit configuration, and configuration with two integrated circuits 有权用于生成仿真电路配置的方法，以及具有两个集成电路的配置公开(公告)号：US06420781B1
公开(公告)日：2002-07-16
申请号：US09164118
申请日：1998-09-30
IPC分类号： H01L2302
CPC分类号： H01L25/0657 , H01L24/73 , H01L2224/16145 , H01L2224/48463 , H01L2225/06513 , H01L2225/06524 , H01L2225/06527 , H01L2924/01013 , H01L2924/01033 , H01L2924/01068 , H01L2924/01079 , H01L2924/01082 , H01L2924/14 , H01L2924/00
摘要： In an uppermost wiring plane of a mass-produced circuit of a micro-controller, contact faces are provided. To produce an emulation circuit a further wiring plane is added to the mass-produced circuit by way of which internal signals are carried to an external terminal. Acting as an interface is an output chip with further emulation logic capabilities which is applied to the emulation circuit in the manner of a flip-chip assembly.
摘要翻译： 在微控制器的质量产生电路的最上面的布线平面中，提供接触面。 为了产生一个仿真电路，另外一个布线平面被添加到质量产生的电路中，通过该电路将内部信号传送到外部端子。 作为接口的是具有进一步的仿真逻辑能力的输出芯片，其以倒装芯片组装的方式应用于仿真电路。
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公开(公告)号：US20160065114A1
公开(公告)日：2016-03-03
申请号：US14784040
申请日：2013-04-30
申请人： Wilhard VON WENDORFF
发明人： WILHARD VON WENDORFF
CPC分类号： H02P29/027 , B62D5/0484 , B62D5/0487
摘要： An electronic device is for controlling motor drive circuits for driving a multi-phase motor in a force assisted system. Each motor drive circuit selectively permitting current to flow into or out of a respective phase of the multi-phase motor connected to the motor drive circuit in response to being driven by respective control signals. A motor control circuit generates the control signals. A fault processor detects at least one fault condition causing a fault current in a first motor drive circuit. In the event of the fault condition being detected, at least one alternative control signal is generated for at least one motor drive circuit for permitting at least one compensation current to flow for reducing a faulty force due to the fault current.
摘要翻译： 电子设备用于控制用于在力辅助系统中驱动多相电动机的电动机驱动电路。 每个电动机驱动电路响应于由相应的控制信号驱动而选择性地允许电流流入或流出连接到电动机驱动电路的多相电动机的相位。 电机控制电路产生控制信号。 故障处理器检测至少一个导致第一电动机驱动电路中的故障电流的故障状况。 在检测到故障状况的情况下，为至少一个电动机驱动电路产生至少一个替代控制信号，以允许至少一个补偿电流流动，以减少由故障电流引起的故障力。
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4.发明授权Coding method for coding control commands for actuators and actuator control unit for controlling actuators 有权编码用于致动器的控制命令的编码方法和用于控制致动器的致动器控制单元公开(公告)号：US07131051B2
公开(公告)日：2006-10-31
申请号：US10195729
申请日：2002-07-15
申请人： Wilhard Von Wendorff
发明人： Wilhard Von Wendorff
IPC分类号： H03M13/00
CPC分类号： B60T8/885 , B60T2270/413 , H03M13/35
摘要： A coding method for coding control commands for actuators includes a system that is sensitive to data transmission errors and determines a degree of danger for the system by using a system control unit. A current transmission control command is coded to form a control command code word, by using the system control device, whereby the redundancy of the control command code word depends on the determined degree of danger. The control command code word from the system control device is transmitted to an actuator control unit and decoded to form a receiving control command. The receiving control command is checked for transmission errors and at least one actuator for carrying out the receiving control command is controlled when no transmission error is detected. An actuator control unit conducts the method.
摘要翻译： 用于对致动器的控制命令进行编码的编码方法包括对数据传输错误敏感的系统，并且通过使用系统控制单元确定系统的危险程度。 通过使用系统控制装置对当前传输控制命令进行编码以形成控制命令码字，由此控制命令码字的冗余取决于所确定的危险程度。 来自系统控制装置的控制命令码字被发送到致动器控制单元并被解码以形成接收控制命令。 检查接收控制命令的传输错误，并且当没有检测到传输错误时，控制用于执行接收控制命令的至少一个致动器。 执行器控制单元进行该方法。
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公开(公告)号：US09634604B2
公开(公告)日：2017-04-25
申请号：US14784040
申请日：2013-04-30
申请人： Wilhard Von Wendorff
发明人： Wilhard Von Wendorff
IPC分类号： H02P29/02 , H02P29/024 , B62D5/04
CPC分类号： H02P29/027 , B62D5/0484 , B62D5/0487
摘要： An electronic device is for controlling motor drive circuits for driving a multi-phase motor in a force assisted system. Each motor drive circuit selectively permitting current to flow into or out of a respective phase of the multi-phase motor connected to the motor drive circuit in response to being driven by respective control signals. A motor control circuit generates the control signals. A fault processor detects at least one fault condition causing a fault current in a first motor drive circuit. In the event of the fault condition being detected, at least one alternative control signal is generated for at least one motor drive circuit for permitting at least one compensation current to flow for reducing a faulty force due to the fault current.
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6.发明申请SYSTEM AND METHOD OF TRANSMITTING DATA BETWEEN DEVICES CONNECTED VIA A BUS DEFINING A TIME SLOT DURING TRANSMISSION FOR RESPONSIVE OUTPUT INFORMATION FROM BUS DEVICES 有权发送设备之间的数据的系统和方法通过总线定义传输期间的时隙，用于从总线设备的响应输出信息公开(公告)号：US20120278520A1
公开(公告)日：2012-11-01
申请号：US13544578
申请日：2012-07-09
IPC分类号： G06F13/42
CPC分类号： G06F13/36 , H04L12/417
摘要： A device and method are provided in which the data to be transmitted is transmitted in units together with information concerning the transmission and/or the use of the data. At least some of the units include at least one region which defines a time slot within which freely selectable devices can output onto the bus data representing freely selectable information at freely selectable points in time.
摘要翻译： 提供了一种设备和方法，其中要发送的数据与关于数据的发送和/或使用的信息一起以单元发送。 至少一些单元包括限定时隙的至少一个区域，其中可自由选择的设备可以在自由选择的时间点上输出表示可自由选择的信息的总线数据。
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公开(公告)号：US20090172282A1
公开(公告)日：2009-07-02
申请号：US11964465
申请日：2007-12-26
申请人： Wilhard von Wendorff
发明人： Wilhard von Wendorff
CPC分类号： G01R31/318533 , G11C2029/3202
摘要： Digital circuits and methods for testing a digital circuit are disclosed. One embodiment provides a digital circuit having a first plurality of storage elements, and a second plurality of storage elements. The digital circuit is operable in a first operation mode and in a second operation mode. In the first operation mode, the storage elements of the first plurality of storage elements operate according to their intended use within the digital circuit and the storage elements of the second plurality of storage elements are connected in series. In the second operation mode, the first plurality of storage elements is connected to the second plurality of storage elements to allow data exchange between the first plurality of storage elements and the second plurality of storage elements.
摘要翻译： 公开了用于测试数字电路的数字电路和方法。 一个实施例提供了具有第一多个存储元件和第二多个存储元件的数字电路。 数字电路可在第一操作模式和第二操作模式中操作。 在第一操作模式中，第一多个存储元件的存储元件根据其在数字电路内的预期用途进行操作，并且第二多个存储元件的存储元件串联连接。 在第二操作模式中，第一多个存储元件连接到第二多个存储元件，以允许第一多个存储元件与第二多个存储元件之间的数据交换。
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公开(公告)号：US20050066245A1
公开(公告)日：2005-03-24
申请号：US10926713
申请日：2004-08-26
申请人： Wilhard Von Wendorff
发明人： Wilhard Von Wendorff
CPC分类号： G06F11/1008
摘要： An arrangement having a data processing device and a memory for storing data which is required by the data processing device is described. The described arrangement is defined by the fact that it contains a checking device which generates signature data when data is read out of the memory, compares the generated signature data with signature data which is fed to the checking device and is assigned to the data which is output from the memory, and determines, as a function of the result of this comparison, whether the data which is output from the memory can be released for use by the data processing device.
摘要翻译： 描述了具有数据处理装置和用于存储由数据处理装置所需的数据的存储器的装置。 所描述的布置由以下事实定义：其包含当从存储器读出数据时生成签名数据的检查装置，将生成的签名数据与馈送到检查装置的签名数据进行比较，并将其分配给数据， 从存储器输出，并且根据该比较的结果确定从存储器输出的数据是否可以被释放供数据处理设备使用。
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公开(公告)号：US08510638B2
公开(公告)日：2013-08-13
申请号：US11479440
申请日：2006-06-30
申请人： Wilhard Von Wendorff
发明人： Wilhard Von Wendorff
IPC分类号： H03M13/00
CPC分类号： B60T8/885 , B60T2270/413 , H03M13/35
摘要： A coding method for coding control commands for actuators includes a system that is sensitive to data transmission errors and determines a degree of danger for the system by using a system control unit. A current transmission control command is coded to form a control command code word, by using the system control device, whereby the redundancy of the control command code word depends on the determined degree of danger. The control command code word from the system control device is transmitted to an actuator control unit and decoded to form a receiving control command. The receiving control command is checked for transmission errors and at least one actuator for carrying out the receiving control command is controlled when no transmission error is detected. An actuator control unit conducts the method.
摘要翻译： 用于对致动器的控制命令进行编码的编码方法包括对数据传输错误敏感的系统，并且通过使用系统控制单元确定系统的危险程度。 通过使用系统控制装置对当前传输控制命令进行编码以形成控制命令码字，由此控制命令码字的冗余取决于所确定的危险程度。 来自系统控制装置的控制命令码字被发送到致动器控制单元并被解码以形成接收控制命令。 检查接收控制命令的传输错误，并且当没有检测到传输错误时，控制用于执行接收控制命令的至少一个致动器。 执行器控制单元进行该方法。
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公开(公告)号：US08365029B2
公开(公告)日：2013-01-29
申请号：US11964465
申请日：2007-12-26
申请人： Wilhard von Wendorff
发明人： Wilhard von Wendorff
IPC分类号： G01R31/28
CPC分类号： G01R31/318533 , G11C2029/3202
摘要： Digital circuits and methods for testing a digital circuit are disclosed. One embodiment provides a digital circuit having a first plurality of storage elements, and a second plurality of storage elements. The digital circuit is operable in a first operation mode and in a second operation mode. In the first operation mode, the storage elements of the first plurality of storage elements operate according to their intended use within the digital circuit and the storage elements of the second plurality of storage elements are connected in series. In the second operation mode, the first plurality of storage elements is connected to the second plurality of storage elements to allow data exchange between the first plurality of storage elements and the second plurality of storage elements.
摘要翻译： 公开了用于测试数字电路的数字电路和方法。 一个实施例提供了具有第一多个存储元件和第二多个存储元件的数字电路。 数字电路可在第一操作模式和第二操作模式中操作。 在第一操作模式中，第一多个存储元件的存储元件根据其在数字电路内的预期用途进行操作，并且第二多个存储元件的存储元件串联连接。 在第二操作模式中，第一多个存储元件连接到第二多个存储元件，以允许第一多个存储元件与第二多个存储元件之间的数据交换。
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