公开(公告)号：US07698802B2

公开(公告)日：2010-04-20

申请号：US12028439

申请日：2008-02-08

申请人： Steven M. Clements ,  William P. Cornwell ,  Carrie E. Cox ,  Hayden C. Cranford, Jr. ,  Vernon R. Norman

发明人： Steven M. Clements ,  William P. Cornwell ,  Carrie E. Cox ,  Hayden C. Cranford, Jr. ,  Vernon R. Norman

IPC分类号： G01R31/28

CPC分类号： G01R35/007 ,  Y10T29/49004 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49169 ,  Y10T29/49174

摘要： A method for manufacturing a calibration device for an active circuit on a chip, comprises: providing an active circuit that is capable of exhibiting a desired electrical characteristic; and providing a calibration mechanism on-chip with the active circuit. The calibration mechanism generates a control output and comprises a device under test (DUT) configured as a replica of at least one segment of the active circuit, and which generates a test output that causes finite adjustments to the control output, based on a comparison of the electrical characteristics exhibited by the DUT with a known electrical characteristic. The method further comprises: attaching to each control input terminal of the active circuit a corresponding control output from the calibration mechanism. The control output of the calibration mechanism dynamically adjusts control input applied to devices of the active circuit to force the active circuit to exhibit the desired electrical characteristic.

摘要翻译： 一种用于制造芯片上的有源电路的校准装置的方法，包括：提供能够呈现所需电特性的有源电路; 并且提供与有源电路片上的校准机制。 所述校准机构产生控制输出，并且包括被配置为所述有源电路的至少一个段的复制品的被测器件（DUT），并且基于所述被测器件的比较，产生对所述控制输出进行有限调整的测试输出 具有已知电特性的DUT所呈现的电特性。 该方法还包括：将有源电路的每个控制输入端连接到校准机构的相应控制输出。 校准机构的控制输出动态调整施加到有源电路的器件的控制输入，以迫使有源电路呈现所需的电特性。

公开(公告)号：US20080120838A1

公开(公告)日：2008-05-29

申请号：US12028439

申请日：2008-02-08

申请人： Steven M. Clements ,  William P. Cornwell ,  Carrie E. Cox ,  Hayden C. Cranford ,  Vernon R. Norman

发明人： Steven M. Clements ,  William P. Cornwell ,  Carrie E. Cox ,  Hayden C. Cranford ,  Vernon R. Norman

IPC分类号： H01R43/00

CPC分类号： G01R35/007 ,  Y10T29/49004 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49169 ,  Y10T29/49174

摘要： Substantially-accurate calibration of output impedance of a device-under-test (DUT) to within a predetermined range of allowable impedance. The DUT is part of a source series terminated (SST) serial link transmitter, in which two branches of parallel transistors each provide an impedance value when particular transistors of the parallel branch are turned on. The impedance value is added to a series-connected resistor to provide the output impedance. The DUT consists of one branch of parallel transistors in series with a resistor. Output impedance of the DUT is compared to the resistance of a reference resistor, and the comparator provides a control signal based on whether the output impedance falls within the pre-set percentage variance of the reference resistance. The control signal is processed by a FSM (finite state machine) that individually turns on or off the transistors within the parallel branch until the DUT impedance value falls within the desired range.

摘要翻译： 将被测器件（DUT）的输出阻抗基本上精确地校准到允许阻抗的预定范围内。 DUT是源极串行端接（SST）串行链路发射机的一部分，其中当并联支路的特定晶体管导通时，并联晶体管的两个分支都提供阻抗值。 将阻抗值加到串联电阻器上以提供输出阻抗。 DUT由与电阻器串联的并行晶体管的一个分支组成。 将DUT的输出阻抗与参考电阻的电阻进行比较，并且比较器根据输出阻抗是否落在参考电阻的预设百分比方差内提供控制信号。 控制信号由FSM（有限状态机）进行处理，FSM单独打开或关闭并联支路内的晶体管，直到DUT阻抗值落在所需范围内。

公开(公告)号：US07368902B2

公开(公告)日：2008-05-06

申请号：US11262101

申请日：2005-10-28

申请人： Steven M. Clements ,  William P. Cornwell ,  Carrie E. Cox ,  Hayden C. Cranford, Jr. ,  Vernon R. Norman

发明人： Steven M. Clements ,  William P. Cornwell ,  Carrie E. Cox ,  Hayden C. Cranford, Jr. ,  Vernon R. Norman

IPC分类号： G01R35/00 ,  H03K19/003 ,  G06F19/00

CPC分类号： G01R35/007 ,  Y10T29/49004 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49169 ,  Y10T29/49174

摘要： Substantially-accurate calibration of output impedance of a device-under-test (DUT) to within a predetermined range of allowable impedance. The DUT is part of a source series terminated (SST) serial link transmitter, in which two branches of parallel transistors each provide an impedance value when particular transistors of the parallel branch are turned on. The impedance value is added to a series-connected resistor to provide the output impedance. The DUT consists of one branch of parallel transistors in series with a resistor. Output impedance of the DUT is compared to the resistance of a reference resistor, and the comparator provides a control signal based on whether the output impedance falls within the pre-set percentage variance of the reference resistance. The control signal is processed by a FSM (finite state machine) that individually turns on or off the transistors within the parallel branch until the DUT impedance value falls within the desired range.

摘要翻译： 将被测器件（DUT）的输出阻抗基本上精确地校准到允许阻抗的预定范围内。 DUT是源极串行端接（SST）串行链路发射机的一部分，其中当并联支路的特定晶体管导通时，并联晶体管的两个分支都提供阻抗值。 将阻抗值加到串联电阻器上以提供输出阻抗。 DUT由与电阻器串联的并行晶体管的一个分支组成。 将DUT的输出阻抗与参考电阻的电阻进行比较，并且比较器根据输出阻抗是否落在参考电阻的预设百分比方差内提供控制信号。 控制信号由FSM（有限状态机）进行处理，FSM单独打开或关闭并联支路内的晶体管，直到DUT阻抗值落在所需范围内。

公开(公告)号：US07307447B2

公开(公告)日：2007-12-11

申请号：US11263138

申请日：2005-10-27

申请人： Steven M. Clements ,  William P. Cornwell ,  Carrie E. Cox ,  Hayden C. Cranford, Jr. ,  Todd M. Rasmus

发明人： Steven M. Clements ,  William P. Cornwell ,  Carrie E. Cox ,  Hayden C. Cranford, Jr. ,  Todd M. Rasmus

IPC分类号： H03K17/16 ,  H03B1/00

CPC分类号： H03K17/164 ,  H03K19/018585 ,  H04L25/0272 ,  H04L25/0278 ,  H04L25/028

摘要： A circuit design method and transmitter that enables flexible control of amplitude, pre-emphasis, and slew rate utilizing a design of a segmented self-series terminated (SSST) transmitter having a parallel configuration of multiple, individually controllable segments of dual pull-up and pull-down transistors. Amplitude control, slew rate control and pre-emphasis control are enabled by manipulation/selection of normal or inverted inputs for the various segments. Also provided is a mechanism for providing/maintaining accurate output across a self-series terminated (SST) transmitter by regulating the supply voltage. Regulation of the supply voltage allows compatibility with conventional serial link receiver termination voltages and protects the transmitter output devices when those voltages are larger than the normal supply for the devices.

摘要翻译： 一种电路设计方法和发射机，其利用分段自串式终止（SSST）发射机的设计来灵活地控制振幅，预加重和转换速率，该发射机具有双重上拉的多个单独可控段的并行配置， 下拉晶体管。 幅度控制，转换速率控制和预加重控制可以通过对各个段的正常或反相输入进行操作/选择来实现。 还提供了一种用于通过调节电源电压来提供/保持跨越自串式端接（SST）发射器的精确输出的机构。 电源电压的调节允许与传统的串行链路接收器终端电压兼容，并在这些电压大于设备的正常供电时保护发射机输出设备。

公开(公告)号：US07570071B2

公开(公告)日：2009-08-04

申请号：US12028451

申请日：2008-02-08

申请人： Steven M. Clements ,  William P. Cornwell ,  Carrie E. Cox ,  Hayden C. Cranford, Jr. ,  Vernon R. Norman

发明人： Steven M. Clements ,  William P. Cornwell ,  Carrie E. Cox ,  Hayden C. Cranford, Jr. ,  Vernon R. Norman

IPC分类号： G01R31/28 ,  G01R35/00 ,  H03K19/003 ,  G06F19/00

CPC分类号： G01R35/007 ,  Y10T29/49004 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49169 ,  Y10T29/49174

摘要： Substantially-accurate calibration of output impedance of a device-under-test (DUT) to within a predetermined range of allowable impedance. The DUT is part of a source series terminated (SST) serial link transmitter, in which two branches of parallel transistors each provide an impedance value when particular transistors of the parallel branch are turned on. The impedance value is added to a series-connected resistor to provide the output impedance. The DUT consists of one branch of parallel transistors in series with a resistor. Output impedance of the DUT is compared to the resistance of a reference resistor, and the comparator provides a control signal based on whether the output impedance falls within the pre-set percentage variance of the reference resistance. The control signal is processed by a FSM (finite state machine) that individually turns on or off the transistors within the parallel branch until the DUT impedance value falls within the desired range.

摘要翻译： 将被测器件（DUT）的输出阻抗基本上精确地校准到允许阻抗的预定范围内。 DUT是源极串行端接（SST）串行链路发射机的一部分，其中当并联支路的特定晶体管导通时，并联晶体管的两个分支都提供阻抗值。 将阻抗值加到串联电阻器上以提供输出阻抗。 DUT由与电阻器串联的并行晶体管的一个分支组成。 将DUT的输出阻抗与参考电阻的电阻进行比较，并且比较器根据输出阻抗是否落在参考电阻的预设百分比方差内提供控制信号。 控制信号由FSM（有限状态机）进行处理，FSM单独打开或关闭并联支路内的晶体管，直到DUT阻抗值落在所需范围内。

公开(公告)号：US20080122452A1

公开(公告)日：2008-05-29

申请号：US12028451

申请日：2008-02-08

申请人： Steven M. Clements ,  William P. Cornwell ,  Carrie E. Cox ,  Hayden C. Cranford ,  Vernon R. Norman

发明人： Steven M. Clements ,  William P. Cornwell ,  Carrie E. Cox ,  Hayden C. Cranford ,  Vernon R. Norman

IPC分类号： G01R35/00

CPC分类号： G01R35/007 ,  Y10T29/49004 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49169 ,  Y10T29/49174

摘要： Substantially-accurate calibration of output impedance of a device-under-test (DUT) to within a predetermined range of allowable impedance. The DUT is part of a source series terminated (SST) serial link transmitter, in which two branches of parallel transistors each provide an impedance value when particular transistors of the parallel branch are turned on. The impedance value is added to a series-connected resistor to provide the output impedance. The DUT consists of one branch of parallel transistors in series with a resistor. Output impedance of the DUT is compared to the resistance of a reference resistor, and the comparator provides a control signal based on whether the output impedance falls within the pre-set percentage variance of the reference resistance. The control signal is processed by a FSM (finite state machine) that individually turns on or off the transistors within the parallel branch until the DUT impedance value falls within the desired range.