公开(公告)号：US11809262B2

公开(公告)日：2023-11-07

申请号：US17383636

申请日：2021-07-23

Applicant: YOUNGTEK ELECTRONICS CORPORATION

Inventor： Ching-Yung Tseng ,  Yong-Da Weng ,  Ping-Lung Wang

IPC: G06F1/329 ,  G06F1/3296 ,  G06F1/3206 ,  G06F1/20

CPC classification number: G06F1/3296 ,  G06F1/206 ,  G06F1/3206

Abstract: A power adjustment circuit, an adjustable power supply system and an adjustable power supply method are provided. The adjustable power supply system includes a power module, a device power supply, and a control circuit. The device power supply provides a supplied power to a device to be tested according to an operating voltage. The control circuit outputs an adjustment signal to the power module according to a power consumption status of the device to be tested. The power module generates the operating voltage according to the adjustment signal, and allows a first power dissipation generated by the device power supply to be less than a predetermined power.

公开(公告)号：US20210043532A1

公开(公告)日：2021-02-11

申请号：US16897367

申请日：2020-06-10

Applicant: YOUNGTEK ELECTRONICS CORPORATION

Inventor： HSI-YING YUAN ,  TUNG-CHUAN WANG ,  CHUN-YUAN HOU ,  PING-LUNG WANG ,  Tzu-kuei Wen

IPC: H01L23/367 ,  H01L23/31 ,  H01L23/538 ,  H01L23/00 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56

Abstract: A power chip package module and a manufacturing method thereof are provided. In the manufacturing method, a temporary carrier having an alignment pattern is provided, in which the temporary carrier includes a base and a peelable adhesive material disposed on the base. Thereafter, a circuit board having an accommodating space passing therethrough is disposed on the temporary carrier according to the alignment pattern. Furthermore, a chip is disposed in the accommodating space with an active surface thereof facing the temporary carrier according to the alignment pattern, in which the chip is fixed on the temporary carrier by the peelable adhesive material. The accommodating space is filled with a molding material to form an initial package structure. The initial package structure is separated from the temporary carrier, and then an electrically and thermally conductive layer is formed on a bottom surface of the chip and is in contact therewith.

公开(公告)号：US20220155845A1

公开(公告)日：2022-05-19

申请号：US17383636

申请日：2021-07-23

Applicant: YOUNGTEK ELECTRONICS CORPORATION

Inventor： Ching-Yung Tseng ,  Yong-Da Weng ,  PING-LUNG WANG

IPC: G06F1/3296 ,  G06F1/20 ,  G06F1/3206

Abstract: A power adjustment circuit, an adjustable power supply system and an adjustable power supply method are provided. The adjustable power supply system includes a power module, a device power supply, and a control circuit. The device power supply provides a supplied power to a device to be tested according to an operating voltage. The control circuit outputs an adjustment signal to the power module according to a power consumption status of the device to be tested. The power module generates the operating voltage according to the adjustment signal, and allows a first power dissipation generated by the device power supply to be less than a predetermined power.

公开(公告)号：US20220146575A1

公开(公告)日：2022-05-12

申请号：US17460298

申请日：2021-08-29

Applicant: YOUNGTEK ELECTRONICS CORPORATION

Inventor： Ching-Yung Tseng ,  Yu-Chih Cheng ,  PING-LUNG WANG

IPC: G01R31/319 ,  G01R31/3193

Abstract: A multi-channel timing calibration device and a method applicable thereto are provided. The device includes: a plurality of channel inputs, at least one relay switch, at least one comparator, at least one first multiplexer, and a time measurement chip. The at least one comparator is connected to the at least one relay switch, and connected to a reference voltage or a digital analog converter. The at least one first multiplexer has different signals for different channel groups and outputs a signal of a designated channel. The time measurement chip calculates a timing difference of each of the channels of each of the channel inputs as a basis for delay of the timing signals.

公开(公告)号：US20140048457A1

公开(公告)日：2014-02-20

申请号：US14057785

申请日：2013-10-18

Applicant: YOUNGTEK ELECTRONICS CORPORATION

Inventor： Bily WANG ,  Kuei-Pao CHEN ,  Hsin-Cheng CHEN

IPC: B07C5/00

CPC classification number: B07C5/00 ,  B07C5/344 ,  G01R31/01 ,  G01R31/2893

Abstract: A packaged chip detection and classification device includes a rotation unit for transporting a plurality of packaged chips, a packaged chip detection unit, and a packaged chip classification unit. The rotation unit includes a rotary turntable, a plurality of receiving portions formed on the rotary turntable, and a plurality of suction-exhaust openings respectively formed in the receiving portions. Each receiving portion is used to selectively receive at least one of the packaged chips. The packaged chip detection unit includes a packaged chip detection module adjacent to the rotation unit for detecting each packaged chip. The packaged chip classification unit includes a packaged chip classification module adjacent to the rotation unit for classifying the packaged chips. Therefore, the packaged chip detection and classification device can be used to detect and classify no-lead packaged chips by matching the rotation unit, the packaged chip detection unit, and the packaged chip classification unit.

Abstract translation: 封装芯片检测和分类装置包括用于传输多个封装芯片的转动单元，封装芯片检测单元和封装芯片分类单元。 旋转单元包括旋转转盘，形成在旋转转盘上的多个接收部分和分别形成在接收部分中的多个抽吸排气口。 每个接收部分用于选择性地接收至少一个封装的芯片。 封装芯片检测单元包括与用于检测每个封装芯片的旋转单元相邻的封装芯片检测模块。 封装芯片分类单元包括与旋转单元相邻的封装芯片分类模块，用于对封装芯片进行分类。 因此，封装芯片检测和分类装置可以通过匹配旋转单元，封装芯片检测单元和封装芯片分类单元来检测和分类无铅封装芯片。

公开(公告)号：US11531065B2

公开(公告)日：2022-12-20

申请号：US17460298

申请日：2021-08-29

Applicant: YOUNGTEK ELECTRONICS CORPORATION

Inventor： Ching-Yung Tseng ,  Yu-Chih Cheng ,  Ping-Lung Wang

IPC: G01R31/319 ,  G01R31/3193

Abstract: A multi-channel timing calibration device and a method applicable thereto are provided. The device includes: a plurality of channel inputs, at least one relay switch, at least one comparator, at least one first multiplexer, and a time measurement chip. The at least one comparator is connected to the at least one relay switch, and connected to a reference voltage or a digital analog converter. The at least one first multiplexer has different signals for different channel groups and outputs a signal of a designated channel. The time measurement chip calculates a timing difference of each of the channels of each of the channel inputs as a basis for delay of the timing signals.

公开(公告)号：US20160339603A1

公开(公告)日：2016-11-24

申请号：US14803098

申请日：2015-07-19

Applicant: YOUNGTEK ELECTRONICS CORPORATION

Inventor： WEN-MING LIU ,  JUI-HUAI CHENG ,  CHAO-CHING WU ,  CHING-TSUNG CHANG

IPC: B28D5/00 ,  H01L21/304 ,  H01L21/78

CPC classification number: B28D5/0005 ,  H01L21/304 ,  H01L21/78 ,  H01L22/12

Abstract: The present invention relates to a method for splitting circles, and the method is mainly applied to a wafer of semiconductors. A plurality of splitting blades are disposed above the wafer, and conditions and steps are set for switching the plurality of splitting blades based on a safe distance value set at an outer edge of a wafer or a safe distance value set at an inner edge of a metal ring. Accordingly, the plurality of splitting blades are prevented from cutting an outer frame during splitting and failing to complete actions of splitting wafers. The method has an advantage of efficiency of enhancing a production capacity yield rate.

Abstract translation: 本发明涉及一种分割圆的方法，该方法主要应用于半导体晶片。 多个分裂刀片设置在晶片上方，并且设置条件和步骤，用于基于设置在晶片的外边缘处的安全距离值或设置在晶片的内边缘处的安全距离值来切换多个分割刀片 金属环。 因此，可防止多个分裂叶片在分裂期间切割外框，并且不能完成分裂晶片的动作。 该方法具有提高生产能力产率的效率的优点。

公开(公告)号：US20230026488A1

公开(公告)日：2023-01-26

申请号：US17813056

申请日：2022-07-18

Applicant: YOUNGTEK ELECTRONICS CORPORATION

Inventor： Tsan-Hsiung LAI ,  Guang-Chen CHEN ,  Yang-Chieh CHEN ,  Wei-Liang CHOU ,  Ping-Lung WANG

IPC: H01L21/67 ,  H01L21/683 ,  H01L21/68

Abstract: A method for transferring objects and a transfer apparatus using the same are provided. The method includes the following steps: controlling, during a first period, the ejector at an ejecting working position to perform an ejecting process along with a first direction, to transfer the object from the first substrate to the second substrate; controlling, during a second period, the ejector to move to an ejecting standby position along with a second direction which is non-parallel to the first direction, to expose at least one of the object on the first substrate to a detection range of an image capturing device; detecting the position of the object in the detection range to obtain calibration information; and adjusting the position of the first substrate according to the calibration information.

公开(公告)号：US11145565B2

公开(公告)日：2021-10-12

申请号：US16897367

申请日：2020-06-10

Applicant: YOUNGTEK ELECTRONICS CORPORATION

Inventor： Hsi-Ying Yuan ,  Tung-Chuan Wang ,  Chun-Yuan Hou ,  Ping-Lung Wang ,  Tzu-kuei Wen

IPC: H01L23/053 ,  H01L23/34 ,  H01L23/48 ,  H01L21/00 ,  H05K7/20 ,  H05K7/00 ,  H01L23/367 ,  H01L23/538 ,  H01L23/00 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/498

Abstract: A power chip package module and a manufacturing method thereof are provided. In the manufacturing method, a temporary carrier having an alignment pattern is provided, in which the temporary carrier includes a base and a peelable adhesive material disposed on the base. Thereafter, a circuit board having an accommodating space passing therethrough is disposed on the temporary carrier according to the alignment pattern. Furthermore, a chip is disposed in the accommodating space with an active surface thereof facing the temporary carrier according to the alignment pattern, in which the chip is fixed on the temporary carrier by the peelable adhesive material. The accommodating space is filled with a molding material to form an initial package structure. The initial package structure is separated from the temporary carrier, and then an electrically and thermally conductive layer is formed on a bottom surface of the chip and is in contact therewith.

公开(公告)号：US09029725B2

公开(公告)日：2015-05-12

申请号：US14057785

申请日：2013-10-18

Applicant: Youngtek Electronics Corporation

Inventor： Bily Wang ,  Kuei-Pao Chen ,  Hsin-Cheng Chen

IPC: B07C5/344 ,  B07C5/00 ,  G01R31/01 ,  G01R31/28

CPC classification number: B07C5/00 ,  B07C5/344 ,  G01R31/01 ,  G01R31/2893

Abstract: A packaged chip detection and classification device includes a rotation unit for transporting a plurality of packaged chips, a packaged chip detection unit, and a packaged chip classification unit. The rotation unit includes a rotary turntable, a plurality of receiving portions formed on the rotary turntable, and a plurality of suction-exhaust openings respectively formed in the receiving portions. Each receiving portion is used to selectively receive at least one of the packaged chips. The packaged chip detection unit includes a packaged chip detection module adjacent to the rotation unit for detecting each packaged chip. The packaged chip classification unit includes a packaged chip classification module adjacent to the rotation unit for classifying the packaged chips. Therefore, the packaged chip detection and classification device can be used to detect and classify no-lead packaged chips by matching the rotation unit, the packaged chip detection unit, and the packaged chip classification unit.

Abstract translation: 封装芯片检测和分类装置包括用于传输多个封装芯片的转动单元，封装芯片检测单元和封装芯片分类单元。 旋转单元包括旋转转盘，形成在旋转转盘上的多个接收部分和分别形成在接收部分中的多个抽吸排气口。 每个接收部分用于选择性地接收至少一个封装的芯片。 封装芯片检测单元包括与用于检测每个封装芯片的旋转单元相邻的封装芯片检测模块。 封装芯片分类单元包括与旋转单元相邻的封装芯片分类模块，用于对封装芯片进行分类。 因此，封装芯片检测和分类装置可以通过匹配旋转单元，封装芯片检测单元和封装芯片分类单元来检测和分类无铅封装芯片。