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    Method of manufacturing mixed mode semiconductor device
    1.
    发明授权
    Method of manufacturing mixed mode semiconductor device 有权
    混合模式半导体器件的制造方法

    公开(公告)号：US06242315B1

    公开(公告)日：2001-06-05

    申请号：US09186126

    申请日：1998-11-04

    申请人： Chen-Bin Lin ,  Cheng-Hui Chung ,  Yei-Hsiung Lin ,  Ching-Chun Huang

    发明人： Chen-Bin Lin ,  Cheng-Hui Chung ,  Yei-Hsiung Lin ,  Ching-Chun Huang

    IPC分类号： H01L2120

    CPC分类号： H01L28/55 ,  H01L21/76838 ,  H01L28/60

    摘要： A method of manufacturing the metallic electrodes of a capacitor in a mixed mode semiconductor device. The method comprises the steps of providing a substrate having a conductive layer and the lower electrode of a capacitor formed thereon, and then depositing a dielectric layer over the substrate. A first opening and a second opening are then formed in the dielectric layer. The first opening exposes a portion of the conductive layer while the second opening exposes a portion of the lower electrode. Finally, a conductive plug and the upper electrode of the capacitor are formed in the respective first and second openings that are in corresponding positions above the conductive layer and lower electrode, respectively.

    摘要翻译： 一种在混合模式半导体器件中制造电容器的金属电极的方法。 该方法包括以下步骤：提供具有导电层和形成在其上的电容器的下电极的衬底，然后在衬底上沉积介电层。 然后在电介质层中形成第一开口和第二开口。 第一开口暴露导电层的一部分，而第二开口暴露下部电极的一部分。 最后，分别在导电层和下电极上方的相应位置的相应的第一和第二开口中形成导电插塞和电容器的上电极。

    Method of forming self-aligned silicides
    2.
    发明申请
    Method of forming self-aligned silicides 有权
    形成自对准硅化物的方法

    公开(公告)号：US20060121708A1

    公开(公告)日：2006-06-08

    申请号：US11004949

    申请日：2004-12-07

    申请人： Yei-Hsiung Lin ,  Steven Huang

    发明人： Yei-Hsiung Lin ,  Steven Huang

    IPC分类号： H01L21/28

    CPC分类号： H01L29/665 ,  H01L21/823418 ,  H01L21/823443

    摘要： A method of forming self-aligned suicides is described and applied to a substrate having an isolation area, which divides the substrate into a first area and a second area. A resist protective oxide layer is formed on the substrate, and subsequently a mask layer is formed on the resist protective oxide layer. Further, the mask layer includes an opening on the first area and another opening on a contact hole of the second area. When a resist protective oxide process is performed, the mask layer protects the resist protective oxide layer underlying the same from being removed, whereas the resist protective oxide layer under the openings are removed. Therefore, silicides are controlled to form on the first area and the contact hole of the second area in a subsequent self-aligned silicidation process.

    摘要翻译： 描述形成自对准自杀剂的方法并将其应用于具有隔离区域的基板，该基板将基板分成第一区域和第二区域。 在衬底上形成抗蚀保护氧化层，随后在抗蚀剂保护氧化物层上形成掩模层。 此外，掩模层包括第一区域上的开口和第二区域的接触孔上的另一开口。 当进行抗蚀剂保护氧化物处理时，掩模层保护其下面的抗蚀剂保护氧化物层被去除，而除去开口下面的抗蚀保护氧化物层。 因此，在随后的自对准硅化工艺中，硅化物被控制形成在第二区域的第一区域和接触孔上。

    Method of manufacturing metallic interconnect
    3.
    发明授权
    Method of manufacturing metallic interconnect 失效
    制造金属互连的方法

    公开(公告)号：US06376359B1

    公开(公告)日：2002-04-23

    申请号：US09080082

    申请日：1998-05-15

    申请人： Yei-Hsiung Lin ,  Chen-Bin Lin ,  Chin-Chun Huang

    发明人： Yei-Hsiung Lin ,  Chen-Bin Lin ,  Chin-Chun Huang

    IPC分类号： H01L214763

    CPC分类号： H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method of manufacturing metallic interconnects capable of reducing internal stress inside the metallic layer. The method comprises the steps of forming a silicon-rich oxide layer both before and after the formation of a metallic layer. Therefore, the metallic layer is fully enclosed by silicon-rich oxide layers and any direct contact between the metallic layer and any silicon dioxide layer is avoided. Since the quantity of silicon in the silicon-rich oxide layer is much higher than in a silicon dioxide layer, bonds formed between a silicon atom and an oxygen atom in the silicon-rich oxide layer are much stronger. Consequently, the chance for an aluminum atom in the metallic layer to react with an oxygen atom in the silicon-rich oxide layer is greatly reduced. Hence, lattice vacancies/voids that can lead to conventional stress migration and thermal induced migration problems are prevented.

    摘要翻译： 一种能够减少金属层内的内部应力的金属互连的制造方法。 该方法包括在形成金属层之前和之后形成富硅氧化物层的步骤。 因此，金属层被富硅氧化物层完全封闭，并且避免了金属层和任何二氧化硅层之间的任何直接接触。 由于富硅氧化物层中的硅量远高于二氧化硅层，所以富硅氧化物层中的硅原子和氧原子之间形成的键更强。 因此，金属层中的铝原子与富氧氧化物层中的氧原子反应的可能性大大降低。 因此，可以防止可能导致常规应力迁移和热诱导迁移问题的晶格空位/空隙。

    Method of forming self-aligned silicides
    5.
    发明授权
    Method of forming self-aligned silicides 有权
    形成自对准硅化物的方法

    公开(公告)号：US07432181B2

    公开(公告)日：2008-10-07

    申请号：US11004949

    申请日：2004-12-07

    申请人： Yei-Hsiung Lin ,  Steven Huang

    发明人： Yei-Hsiung Lin ,  Steven Huang

    IPC分类号： H01L21/28 ,  H01L21/44 ,  H01L21/302 ,  H01L21/461

    CPC分类号： H01L29/665 ,  H01L21/823418 ,  H01L21/823443

    摘要： A method of forming self-aligned silicides is described and applied to a substrate having an isolation area, which divides the substrate into a first area and a second area. A resist protective oxide layer is formed on the substrate, and subsequently a mask layer is formed on the resist protective oxide layer. Further, the mask layer includes an opening on the first area and another opening on a contact hole of the second area. When a resist protective oxide process is performed, the mask layer protects the resist protective oxide layer underlying the same from being removed, whereas the resist protective oxide layer under the openings are removed. Therefore, silicides are controlled to form on the first area and the contact hole of the second area in a subsequent self-aligned silicidation process.

    摘要翻译： 描述形成自对准硅化物的方法并将其应用于具有隔离区域的基板，该基板将基板分成第一区域和第二区域。 在衬底上形成抗蚀保护氧化层，随后在抗蚀剂保护氧化物层上形成掩模层。 此外，掩模层包括第一区域上的开口和第二区域的接触孔上的另一开口。 当进行抗蚀剂保护氧化物处理时，掩模层保护其下面的抗蚀剂保护氧化物层被去除，而除去开口下面的抗蚀保护氧化物层。 因此，在随后的自对准硅化工艺中，硅化物被控制形成在第二区域的第一区域和接触孔上。