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公开(公告)号：US09416459B2
公开(公告)日：2016-08-16
申请号：US13154420
申请日：2011-06-06
申请人： Chun-Ling Lin , Yen-Liang Lu , Chi-Mao Hsu , Chin-Fu Lin , Chun-Hung Chen , Tsun-Min Cheng , Chi-Ray Tsai
发明人： Chun-Ling Lin , Yen-Liang Lu , Chi-Mao Hsu , Chin-Fu Lin , Chun-Hung Chen , Tsun-Min Cheng , Chi-Ray Tsai
CPC分类号： C25D5/54 , C25D3/38 , C25D5/00 , C25D5/10 , C25D7/123 , H01L21/2885 , H01L21/76879
摘要： An electrical chemical plating process is provided. A semiconductor structure is provided in an electrical plating platform. A pre-electrical-plating step is performed wherein the pre-electrical-plating step is carried out under a fixed voltage environment and lasts for 0.2 to 0.5 seconds after the current is above the threshold current of the electrical plating platform. After the pre-electrical-plating step, a first electrical plating step is performed on the semiconductor structure.
摘要翻译： 提供电化学镀工艺。 半导体结构设置在电镀平台中。 进行预电镀步骤，其中预电镀步骤在固定电压环境下进行，并且在电流高于电镀平台的阈值电流之后持续0.2至0.5秒。 在预电镀步骤之后，对半导体结构进行第一电镀步骤。
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公开(公告)号：US20130045595A1
公开(公告)日：2013-02-21
申请号：US13210380
申请日：2011-08-16
申请人： Tsun-Min Cheng , Chien-Chao Huang , Chin-Fu Lin , Chi-Mao Hsu , Yen-Liang Lu , Chun-Ling Lin
发明人： Tsun-Min Cheng , Chien-Chao Huang , Chin-Fu Lin , Chi-Mao Hsu , Yen-Liang Lu , Chun-Ling Lin
IPC分类号： H01L21/283
CPC分类号： H01L21/76883
摘要： The method for processing a metal layer including the following steps is illustrated. First, a semiconductor substrate is provided. Then, a metal layer is formed over the semiconductor substrate. Furthermore, a microwave energy is used to selectively heat the metal layer without affecting the underlying semiconductor substrate and other formed structures, in which the microwave energy has a predetermined frequency in accordance with a material of the metal layer, and the predetermined frequency ranges between 1 KHz to 1 MHz.
摘要翻译： 示出了包括以下步骤的金属层的处理方法。 首先，提供半导体基板。 然后，在半导体衬底上形成金属层。 此外，使用微波能量来选择性地加热金属层，而不影响下面的半导体衬底和其它形成的结构，其中微波能量根据金属层的材料具有预定的频率，并且预定的频率范围在1 KHz至1MHz。
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公开(公告)号：US20120295437A1
公开(公告)日：2012-11-22
申请号：US13108969
申请日：2011-05-16
申请人： Yen-Liang Lu , Chun-Ling Lin , Chi-Mao Hsu , Chin-Fu Lin , Chun-Hung Chen , Tsun-Min Cheng , Meng-Hong Tsai
发明人： Yen-Liang Lu , Chun-Ling Lin , Chi-Mao Hsu , Chin-Fu Lin , Chun-Hung Chen , Tsun-Min Cheng , Meng-Hong Tsai
IPC分类号： H01L21/283
CPC分类号： H01L21/76898 , H01L21/76828 , H01L21/76831
摘要： A method for fabricating through-silicon via structure is disclosed. The method includes the steps of: providing a semiconductor substrate; forming a through-silicon via in the semiconductor substrate; covering a liner in the through-silicon via; performing a baking process on the liner; forming a barrier layer on the liner; and forming a through-silicon via electrode in the through-silicon via.
摘要翻译： 公开了一种制造硅通孔结构的方法。 该方法包括以下步骤：提供半导体衬底; 在半导体衬底中形成穿硅通孔; 覆盖穿通硅通孔内的衬垫; 在衬垫上进行烘烤过程; 在衬垫上形成阻挡层; 以及在所述贯通硅通孔中形成贯通硅通孔电极。
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公开(公告)号：US20050132285A1
公开(公告)日：2005-06-16
申请号：US10876082
申请日：2004-06-24
申请人： Sung-Chieh Chen , Yen-Liang Lu , Pai-Pin Wang
发明人： Sung-Chieh Chen , Yen-Liang Lu , Pai-Pin Wang
CPC分类号： G06F17/248
摘要： A system for generating webpages. The system comprises a web data generating module, a format template editing module, a content template editing module, and an integration module. The web data generating module generates a format template and a content template according to a preset model, wherein the model comprises at least one page element. The format template editing module adjusts the format template, wherein the format template comprises at least one format element. The content template editing module adjusts the content template, wherein the content template comprises at least one content element. The integration module, connected to the format template adjusting module and the content template adjusting module, retrieves content element from the adjusted content template, combines it into corresponding format element of the adjusted format template, and generates the webpage accordingly.
摘要翻译： 用于生成网页的系统。 该系统包括网络数据生成模块，格式模板编辑模块，内容模板编辑模块和集成模块。 网络数据生成模块根据预设模型生成格式模板和内容模板，其中模型包括至少一个页面元素。 格式模板编辑模块调整格式模板，其中格式模板包括至少一个格式元素。 内容模板编辑模块调整内容模板，其中内容模板包括至少一个内容元素。 连接到格式模板调整模块和内容模板调整模块的集成模块从调整后的内容模板中检索内容元素，并将其组合到调整格式模板的相应格式元素中，并相应生成网页。
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公开(公告)号：US20120305403A1
公开(公告)日：2012-12-06
申请号：US13154420
申请日：2011-06-06
申请人： Chun-Ling Lin , Yen-Liang Lu , Chi-Mao Hsu , Chin-Fu Lin , Chun-Hung Chen , Tsun-Min Cheng , Meng-Hong Tsai
发明人： Chun-Ling Lin , Yen-Liang Lu , Chi-Mao Hsu , Chin-Fu Lin , Chun-Hung Chen , Tsun-Min Cheng , Meng-Hong Tsai
CPC分类号： C25D5/54 , C25D3/38 , C25D5/00 , C25D5/10 , C25D7/123 , H01L21/2885 , H01L21/76879
摘要： An electrical chemical plating process is provided. A semiconductor structure is provided in an electrical plating platform. A pre-electrical-plating step is performed wherein the pre-electrical-plating step is carried out under a fixed voltage environment and lasts for 0.2 to 0.5 seconds after the current is above the threshold current of the electrical plating platform. After the pre-electrical-plating step, a first electrical plating step is performed on the semiconductor structure.
摘要翻译： 提供电化学镀工艺。 半导体结构设置在电镀平台中。 进行预电镀步骤，其中预电镀步骤在固定电压环境下进行，并且在电流高于电镀平台的阈值电流之后持续0.2至0.5秒。 在预电镀步骤之后，对半导体结构进行第一电镀步骤。
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公开(公告)号：US20130023098A1
公开(公告)日：2013-01-24
申请号：US13184572
申请日：2011-07-18
申请人： Po-Cheng Huang , Kuo-Chih Lai , Ching-I Li , Yu-Shu Lin , Ya-Jyuan Hung , Yen-Liang Lu , Yu-Wen Wang , Hsin-Chih Yu
发明人： Po-Cheng Huang , Kuo-Chih Lai , Ching-I Li , Yu-Shu Lin , Ya-Jyuan Hung , Yen-Liang Lu , Yu-Wen Wang , Hsin-Chih Yu
IPC分类号： H01L21/336
CPC分类号： H01L29/66545 , H01L29/4966 , H01L29/51 , H01L29/6659 , H01L29/66606 , H01L29/7833
摘要： A manufacturing method for a metal gate includes providing a substrate having a dielectric layer and a polysilicon layer formed thereon, the polysilicon layer, forming a protecting layer on the polysilicon layer, forming a patterned hard mask on the protecting layer, performing a first etching process to etch the protecting layer and the polysilicon layer to form a dummy gate having a first height on the substrate, forming a multilayered dielectric structure covering the patterned hard mask and the dummy gate, removing the dummy gate to form a gate trench on the substrate, and forming a metal gate having a second height in the gate trench. The second height of the metal gate is substantially equal to the first height of the dummy gate.
摘要翻译： 金属栅极的制造方法包括提供具有形成在其上的电介质层和多晶硅层的基板，多晶硅层，在多晶硅层上形成保护层，在保护层上形成图案化的硬掩模，进行第一蚀刻工艺 蚀刻保护层和多晶硅层，以在衬底上形成具有第一高度的虚拟栅极，形成覆盖图案化硬掩模和伪栅极的多层介电结构，去除伪栅极以在衬底上形成栅极沟槽， 以及在所述栅极沟槽中形成具有第二高度的金属栅极。 金属栅极的第二高度基本上等于虚拟栅极的第一高度。
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公开(公告)号：US08486790B2
公开(公告)日：2013-07-16
申请号：US13184572
申请日：2011-07-18
申请人： Po-Cheng Huang , Kuo-Chih Lai , Ching-I Li , Yu-Shu Lin , Ya-Jyuan Hung , Yen-Liang Lu , Yu-Wen Wang , Hsin-Chih Yu
发明人： Po-Cheng Huang , Kuo-Chih Lai , Ching-I Li , Yu-Shu Lin , Ya-Jyuan Hung , Yen-Liang Lu , Yu-Wen Wang , Hsin-Chih Yu
IPC分类号： H01L21/336
CPC分类号： H01L29/66545 , H01L29/4966 , H01L29/51 , H01L29/6659 , H01L29/66606 , H01L29/7833
摘要： A manufacturing method for a metal gate includes providing a substrate having a dielectric layer and a polysilicon layer formed thereon, the polysilicon layer, forming a protecting layer on the polysilicon layer, forming a patterned hard mask on the protecting layer, performing a first etching process to etch the protecting layer and the polysilicon layer to form a dummy gate having a first height on the substrate, forming a multilayered dielectric structure covering the patterned hard mask and the dummy gate, removing the dummy gate to form a gate trench on the substrate, and forming a metal gate having a second height in the gate trench. The second height of the metal gate is substantially equal to the first height of the dummy gate.
摘要翻译： 金属栅极的制造方法包括提供具有形成在其上的电介质层和多晶硅层的基板，多晶硅层，在多晶硅层上形成保护层，在保护层上形成图案化的硬掩模，进行第一蚀刻工艺 蚀刻保护层和多晶硅层，以在衬底上形成具有第一高度的虚拟栅极，形成覆盖图案化硬掩模和伪栅极的多层介电结构，去除伪栅极以在衬底上形成栅极沟槽， 以及在所述栅极沟槽中形成具有第二高度的金属栅极。 金属栅极的第二高度基本上等于虚拟栅极的第一高度。
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公开(公告)号：US08481425B2
公开(公告)日：2013-07-09
申请号：US13108969
申请日：2011-05-16
申请人： Yen-Liang Lu , Chun-Ling Lin , Chi-Mao Hsu , Chin-Fu Lin , Chun-Hung Chen , Tsun-Min Cheng , Meng-Hong Tsai
发明人： Yen-Liang Lu , Chun-Ling Lin , Chi-Mao Hsu , Chin-Fu Lin , Chun-Hung Chen , Tsun-Min Cheng , Meng-Hong Tsai
IPC分类号： H01L21/44
CPC分类号： H01L21/76898 , H01L21/76828 , H01L21/76831
摘要： A method for fabricating through-silicon via structure is disclosed. The method includes the steps of: providing a semiconductor substrate; forming a through-silicon via in the semiconductor substrate; covering a liner in the through-silicon via; performing a baking process on the liner; forming a barrier layer on the liner; and forming a through-silicon via electrode in the through-silicon via.
摘要翻译： 公开了一种制造硅通孔结构的方法。 该方法包括以下步骤：提供半导体衬底; 在半导体衬底中形成穿硅通孔; 覆盖穿通硅通孔内的衬垫; 在衬垫上进行烘烤过程; 在衬垫上形成阻挡层; 以及在所述贯通硅通孔中形成贯通硅通孔电极。
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