Abstract:
An image sensor coated with an anti-reflection material having a microlens provided on a semiconductor substrate, the microlens corresponding to a light receiving device formed in the semiconductor substrate wherein the image sensor includes a first layer coated on a surface of the microlens, and a second layer coated on the first layer, wherein the second layer has a smaller refractive index than the first layer.
Abstract:
An image sensor includes a first type semiconductor layer, a second type semiconductor layer and a first type well. The first type semiconductor layer is formed on a semiconductor substrate and includes a plurality of pixels which receive external light and convert optical charges into an electrical signal. The second type semiconductor layer is supplied with a drain voltage to have a potential different from that of the first semiconductor layer, and the first type well controls a power source voltage (VDD) using the drain voltage.
Abstract:
An image sensor applying a power voltage to a backside of a semiconductor substrate includes a first type semiconductor substrate, a first type semiconductor layer formed on the first type semiconductor substrate, a second type semiconductor layer formed on the first type semiconductor layer, and a power voltage receiver formed on a backside of the first type semiconductor substrate opposite the first type semiconductor layer with respect to the first type semiconductor substrate, wherein the power voltage receiver receives a power voltage from outside and applies the power voltage to the first type semiconductor substrate.
Abstract:
An image sensor includes a first type semiconductor layer, a second type semiconductor layer and a first type well. The first type semiconductor layer is formed on a semiconductor substrate and includes a plurality of pixels which receive external light and convert optical charges into an electrical signal. The second type semiconductor layer is supplied with a drain voltage to have a potential different from that of the first semiconductor layer, and the first type well controls a power source voltage (VDD) using the drain voltage.