Method for fabricating a DRAM cell capacitor using hemispherical grain (HSG) silicon
    5.
    发明授权
    Method for fabricating a DRAM cell capacitor using hemispherical grain (HSG) silicon 有权
    使用半球形晶粒(HSG)硅制造DRAM单元电容器的方法

    公开(公告)号:US06300192B1

    公开(公告)日:2001-10-09

    申请号:US09458462

    申请日:1999-12-09

    Applicant: Yong-Hyuk Kim

    Inventor: Yong-Hyuk Kim

    CPC classification number: H01L28/84 H01L27/10852

    Abstract: A stacked DRAM cell capacitor having HSG silicon only on a top portion of a storage node, not on a bottom portion thereof. The storage node has a double layer structure including a bottom layer and a top layer. The bottom layer is made of a conductive material that suppresses the growth of HSG seeds. Accordingly, electrical bridges between adjacent storage nodes, particularly at a bottom portion, can be prevented.

    Abstract translation: 具有HSG硅的层叠DRAM单元电容器仅在存储节点的顶部上而不在其底部。 存储节点具有包括底层和顶层的双层结构。 底层由抑制HSG种子生长的导电材料制成。 因此,可以防止相邻存储节点之间,特别是底部的电桥。

    Method for fabricating a DRAM cell capacitor using hemispherical grain (HSG) silicon
    7.
    发明授权
    Method for fabricating a DRAM cell capacitor using hemispherical grain (HSG) silicon 有权
    使用半球形晶粒(HSG)硅制造DRAM单元电容器的方法

    公开(公告)号:US06700148B2

    公开(公告)日:2004-03-02

    申请号:US09935001

    申请日:2001-08-21

    Applicant: Yong-Hyuk Kim

    Inventor: Yong-Hyuk Kim

    CPC classification number: H01L28/84 H01L27/10852

    Abstract: A stacked DRAM cell capacitor having HSG silicon only on a top portion of a storage node, not on a bottom portion thereof. The storage node has a double layer structure including a bottom layer and a top layer. The bottom layer is made of a conductive material that suppresses the growth of HSG seeds. Accordingly, electrical bridges between adjacent storage nodes, particularly at a bottom portion, can be prevented.

    Abstract translation: 具有HSG硅的层叠DRAM单元电容器仅在存储节点的顶部上而不在其底部。 存储节点具有包括底层和顶层的双层结构。 底层由抑制HSG种子生长的导电材料制成。 因此,可以防止相邻存储节点之间,特别是底部的电桥。

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