Patent search ap:("ADVANCED MICRO DEVICES Page INC.") AND inv:"JOHN WUU"

1.

发明申请
MULTI-DIE COMMUNICATIONS COUPLINGS USING A SINGLE BRIDGE DIE 有权

公开(公告)号：US20230069294A1

公开(公告)日：2023-03-02

申请号：US17563921

申请日：2021-12-28

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： RAHUL AGARWAL , RAJA SWAMINATHAN , JOHN WUU , MIHIR PANDYA , SAMUEL D. NAFFZIGER

IPC: H01L23/538 , H01L23/48 , H01L25/18 , H01L25/00

Abstract: A chip for multi-die communications couplings using a single bridge die, includes: a plurality of dies each including one or more functional circuit blocks; and a first bridge die directly communicatively coupling two or more pairs of dies of the plurality of dies.

2.

发明公开
STACKING SEMICONDUCTOR DEVICES BY BONDING FRONT SURFACES OF DIFFERENT DIES TO EACH OTHER 审中-公开

公开(公告)号：US20230268319A1

公开(公告)日：2023-08-24

申请号：US18046519

申请日：2022-10-14

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： RAHUL AGARWAL , RAJA SWAMINATHAN , JOHN WUU

IPC: H01L25/065 , H01L23/48 , H01L23/00 , H01L23/522 , H01L21/768 , H01L21/56

CPC classification number: H01L25/0657 , H01L23/481 , H01L24/16 , H01L24/08 , H01L23/5226 , H01L21/76898 , H01L24/80 , H01L21/561 , H01L21/568 , H01L2224/16225 , H01L2224/08145 , H01L2224/80895 , H01L2224/80896 , H01L2225/06568

Abstract: A semiconductor assembly includes a first die having a front side metallization layer. The semiconductor assembly also includes a second side having a front side metallization layer that is bonded to the front side metallization layer of the first die.

3.

发明申请
ARRANGEMENT AND THERMAL MANAGEMENT OF 3D STACKED DIES 有权

公开(公告)号：US20220059425A1

公开(公告)日：2022-02-24

申请号：US17516988

申请日：2021-11-02

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： JOHN WUU , SAMUEL NAFFZIGER , PATRICK J. SHYVERS , MILIND S. BHAGAVAT , KAUSHIK MYSORE , BRETT P. WILKERSON

IPC: H01L23/367 , H01L25/00 , H01L25/065 , H01L23/36

Abstract: Various semiconductor chip devices with stacked chips are disclosed. In one aspect, a semiconductor chip device is provided. The semiconductor chip device includes a first semiconductor chip that has a floor plan with a high heat producing area and a low heat producing area. At least one second semiconductor chip is stacked on the low heat producing area. The semiconductor chip device also includes means for transferring heat from the high heat producing area.

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