公开(公告)号：US09047173B2

公开(公告)日：2015-06-02

申请号：US13773166

申请日：2013-02-21

Applicant: Advanced Micro Devices, Inc.

Inventor： Alok Garg ,  Sharad Bade ,  John Kalamatianos

IPC: G06F9/26 ,  G06F12/02 ,  G06F12/08

CPC classification number: G06F12/0215 ,  G06F9/3455 ,  G06F9/383 ,  G06F9/3832 ,  G06F12/0862 ,  G06F2212/6026

Abstract: A method, an apparatus, and a non-transitory computer readable medium for tracking prefetches generated by a stride prefetcher are presented. Responsive to a prefetcher table entry for an address stream locking on a stride, prefetch suppression logic is updated and prefetches from the prefetcher table entry are suppressed when suppression is enabled for that prefetcher table entry. A stride is a difference between consecutive addresses in the address stream. A prefetch request is issued from the prefetcher table entry when suppression is not enabled for that prefetcher table entry.

Abstract translation: 提出了一种用于跟踪由步幅预取器产生的预取的方法，装置和非暂时计算机可读介质。 响应于在步幅上锁定的地址流的预取器表条目，预取抑制逻辑被更新，并且对于该预取器表条目启用抑制时，来自预取器表条目的预取被抑制。 步幅是地址流中连续地址之间的差异。 当预取器表项不启用抑制时，从预取器表项发出预取请求。

公开(公告)号：US20140237212A1

公开(公告)日：2014-08-21

申请号：US13773166

申请日：2013-02-21

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Alok Garg ,  Sharad Bade ,  John Kalamatianos

IPC: G06F12/02

CPC classification number: G06F12/0215 ,  G06F9/3455 ,  G06F9/383 ,  G06F9/3832 ,  G06F12/0862 ,  G06F2212/6026

Abstract: A method, an apparatus, and a non-transitory computer readable medium for tracking prefetches generated by a stride prefetcher are presented. Responsive to a prefetcher table entry for an address stream locking on a stride, prefetch suppression logic is updated and prefetches from the prefetcher table entry are suppressed when suppression is enabled for that prefetcher table entry. A stride is a difference between consecutive addresses in the address stream. A prefetch request is issued from the prefetcher table entry when suppression is not enabled for that prefetcher table entry.

Abstract translation: 提出了一种用于跟踪由步幅预取器产生的预取的方法，装置和非暂时计算机可读介质。 响应于在步幅上锁定的地址流的预取器表条目，预取抑制逻辑被更新，并且对于该预取器表条目启用抑制时，来自预取器表条目的预取被抑制。 步幅是地址流中连续地址之间的差异。 当预取器表项不启用抑制时，从预取器表项发出预取请求。