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    Bias current supply techniques
    1.
    发明授权
    Bias current supply techniques 有权

    公开(公告)号：US10541604B2

    公开(公告)日：2020-01-21

    申请号：US15986346

    申请日：2018-05-22

    Applicant: Analog Devices Global Unlimited Company

    Inventor： Christopher Peter Hurrell ,  Derek J. Hummerston

    IPC: H03F3/45 ,  H02M3/07

    Abstract: Techniques for supplying a bias current to a load are provided. In certain examples, a circuit can include a level-shift capacitance, a current source, and a load configured to receive a bias current in a first state of the circuit. The current source and the level-shift capacitance can be coupled in series between the load and a supply voltage in the first state. In some examples, during a second state of the circuit, the level-shift capacitance can receive charge, and can be isolated from one of the load or the current source.

    Auxiliary input for analog-to-digital converter input charge
    5.
    发明授权
    Auxiliary input for analog-to-digital converter input charge 有权

    公开(公告)号：US10541702B1

    公开(公告)日：2020-01-21

    申请号：US16142964

    申请日：2018-09-26

    Applicant: Analog Devices Global Unlimited Company

    Inventor： Rares Andrei Bodnar ,  Christopher Peter Hurrell

    IPC: H03M1/06 ,  H03M1/08 ,  H03H7/06

    Abstract: Input stages for an analog to digital converter wherein charge for charging parasitic capacitances in the input stage, and particularly in the input switch is sourced from a node which means that it does not have to pass through the input RC filter. This has the effect that the input RC filter can be of lower bandwidth, and/or have a larger resistor value, with the consequent result that there is lower power dissipation in the ADC drive circuitry. In one example this effect is realized by providing a separate input into which charge to charge the parasitic capacitances can be fed from external circuitry. In another example an operational amplifier having high (ideally infinite) input impedance can be used to feed charge to the input switch from the input to the RC filter, or from the node between the resistor and capacitor of the filter, again without unsettling the filter.

    Multiplexer distortion cancellation
    6.
    发明授权
    Multiplexer distortion cancellation 有权

    公开(公告)号：US10020068B2

    公开(公告)日：2018-07-10

    申请号：US15266741

    申请日：2016-09-15

    Applicant: Analog Devices Global

    Inventor： Christopher Peter Hurrell ,  Rares Andrei Bodnar ,  Pasquale Delizia

    IPC: G11C27/02 ,  H03K17/693

    CPC classification number: G11C27/02 ,  G11C7/02 ,  G11C27/024 ,  H03K17/693

    Abstract: Distortion in a combined sample and hold circuit and multiplexer can be reduced by dividing the sample and hold circuit and the multiplexer up into main and compensation signal channels, and considering the total error signal that arises during an acquire phase across both the switches of the multiplexer and the input switches of the sample and hold stage as a single error signal that has to be compensated. This compensation is then achieved by causing the same error voltages to be induced in both the main and compensation channels of the whole MUX and sample and hold circuit, such that errors can be made to cancel, thus improving the performance of the stage.

    Method of linearizing the transfer characteristic by dynamic element matching
    9.
    发明授权
    Method of linearizing the transfer characteristic by dynamic element matching 有权

    公开(公告)号：US10511316B2

    公开(公告)日：2019-12-17

    申请号：US16053455

    申请日：2018-08-02

    Applicant: Analog Devices Global Unlimited Company

    Inventor： Rares Bodnar ,  Roberto S. Maurino ,  Christopher Peter Hurrell ,  Asif Ahmad

    IPC: H03M1/66 ,  H03M1/06

    Abstract: A stage, suitable for use in and analog to digital converter or a digital to analog converter, comprises a plurality of slices. The slices can be operated together to form a composite output having reduced thermal noise, while each slice on its own has sufficiently small capacitance to respond quickly to changes in digital codes applied to the slice. This allows a fast conversion to be achieved without loss of noise performance. The slices can be sub-divided to reduce scaling mismatch between the most significant bit and the least significant bit. A shuffling scheme is implemented that allows shuffling to occur between the sub-sections of the slices without needing to implement a massively complex shuffler.

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