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公开(公告)号:US20160094026A1
公开(公告)日:2016-03-31
申请号:US14496839
申请日:2014-09-25
Applicant: ANALOG DEVICES GLOBAL
Inventor: Edward John Coyne , John Twomey , Seamus P. Whiston , David J. Clarke , Donal P. McAuliffe , William Allan Lane , Stephen Denis Heffernan , Brian A. Moane , Brian Michael Sweeney , Patrick Martin McGuinness
CPC classification number: H02H9/044 , H01L27/0259 , H02H7/16
Abstract: A protection device is provided that exhibits a turn on time of order of one nanosecond or less. Such a device provides enhanced protection for integrated circuits against electrostatic discharge events. This in turn reduces the risk of device failure in use. The protection device can include a bipolar transistor structure connected between a node to be protected and a discharge path.
Abstract translation: 提供一种保护装置,其展现了一纳秒或更少的转动时间。 这样一种器件为集成电路提供了防止静电放电事件的增强保护。 这反过来又降低了使用设备故障的风险。 保护装置可以包括连接在要保护的节点和放电路径之间的双极晶体管结构。
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2.
公开(公告)号:US20190293692A1
公开(公告)日:2019-09-26
申请号:US16360356
申请日:2019-03-21
Applicant: Analog Devices Global Unlimited Company
Inventor: David J. Clarke , Stephen Denis Heffernan , Nijun Wei , Alan J. O'Donnell , Patrick Martin McGuinness , Shaun Bradley , Edward John Coyne , David Aherne , David M. Boland
IPC: G01R19/165 , G01R31/00 , G01R31/28 , H01L23/525 , H01L27/02 , H01L23/60 , H01L23/62 , H02H9/04
Abstract: The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, an electrical overstress monitor and/or protection device includes a two different conductive structures configured to electrically arc in response to an EOS event and a sensing circuit configured to detect a change in a physical property of the two conductive structures caused by the EOS event. The two conductive structures have facing surfaces that have different shapes;
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公开(公告)号:US10677822B2
公开(公告)日:2020-06-09
申请号:US15708958
申请日:2017-09-19
Applicant: Analog Devices Global Unlimited Company
Inventor: David J. Clarke , Stephen Denis Heffernan , Alan J. O'Donnell , Patrick M. McGuinness
IPC: G01R31/00 , G01R19/165 , H01L23/60 , H01L27/02 , G01R31/28 , G01N25/04 , H01L23/525 , H01L23/62 , H01L25/065
Abstract: The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, a device configured to monitor electrical overstress (EOS) events includes a pair of spaced conductive structures configured to electrically arc in response to an EOS event, wherein the spaced conductive structures are formed of a material and have a shape such that arcing causes a detectable change in shape of the spaced conductive structures, and wherein the device is configured such that the change in shape of the spaced conductive structures is detectable to serve as an EOS monitor.
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公开(公告)号:US20180088155A1
公开(公告)日:2018-03-29
申请号:US15708958
申请日:2017-09-19
Applicant: Analog Devices Global Unlimited Company
Inventor: David J. Clarke , Stephen Denis Heffernan , Alan J. O'Donnell , Patrick M. McGuinness
IPC: G01R19/165 , H01L23/62 , H01L23/525 , G01N25/04 , G01R31/28
Abstract: The disclosed technology generally relates to electrical overstress protection devices, and more particularly to electrical overstress monitoring devices for detecting electrical overstress events in semiconductor devices. In one aspect, a device configured to monitor electrical overstress (EOS) events includes a pair of spaced conductive structures configured to electrically arc in response to an EOS event, wherein the spaced conductive structures are formed of a material and have a shape such that arcing causes a detectable change in shape of the spaced conductive structures, and wherein the device is configured such that the change in shape of the spaced conductive structures is detectable to serve as an EOS monitor.
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公开(公告)号:US09484739B2
公开(公告)日:2016-11-01
申请号:US14496839
申请日:2014-09-25
Applicant: ANALOG DEVICES GLOBAL
Inventor: Edward John Coyne , John Twomey , Seamus P. Whiston , David J. Clarke , Donal P. McAuliffe , William Allan Lane , Stephen Denis Heffernan , Brian A. Moane , Brian Michael Sweeney , Patrick Martin McGuinness
CPC classification number: H02H9/044 , H01L27/0259 , H02H7/16
Abstract: A protection device is provided that exhibits a turn on time of order of one nanosecond or less. Such a device provides enhanced protection for integrated circuits against electrostatic discharge events. This in turn reduces the risk of device failure in use. The protection device can include a bipolar transistor structure connected between a node to be protected and a discharge path.
Abstract translation: 提供一种保护装置,其展现了一纳秒或更少的转动时间。 这样一种器件为集成电路提供了防止静电放电事件的增强保护。 这反过来又降低了使用设备故障的风险。 保护装置可以包括连接在要保护的节点和放电路径之间的双极晶体管结构。
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