公开(公告)号：US20200091019A1

公开(公告)日：2020-03-19

申请号：US16688811

申请日：2019-11-19

Applicant: Applied Materials, Inc.

Inventor： Liyan Miao ,  Chentsau Ying ,  Xinhai Han ,  Long Lin

IPC: H01L21/66 ,  H01L21/02 ,  H01L21/3205 ,  C23C16/40 ,  C23C16/52 ,  C23C16/34 ,  C23C16/24 ,  C23C16/452 ,  H01J37/32 ,  H01L51/00 ,  C23C16/54 ,  H01L21/683 ,  C23C16/455 ,  C23C16/509

Abstract: Embodiments of the present technology may include a method of forming a stack of semiconductor layers. The method may include depositing a first silicon oxide layer on a substrate. The method may also include depositing a first silicon layer on the first silicon oxide layer. The method may include depositing a first silicon nitride layer on the first silicon layer. The method may further include depositing a second silicon layer on the first silicon nitride layer. In addition, the method may include depositing a stress layer on a side of the substrate opposite a side of the substrate with the first silicon oxide layer. The operations may form a structure of semiconductor layers, where the structure includes the first silicon oxide layer, the first silicon layer, the first silicon nitride layer, the second silicon layer, the substrate, and the stress layer. Other methods of reducing stress are described.

公开(公告)号：US11056406B2

公开(公告)日：2021-07-06

申请号：US16688811

申请日：2019-11-19

Applicant: Applied Materials, Inc.

Inventor： Liyan Miao ,  Chentsau Ying ,  Xinhai Han ,  Long Lin

IPC: H01L51/00 ,  H01L21/66 ,  H01L21/02 ,  H01L21/3205 ,  C23C16/40 ,  C23C16/52 ,  C23C16/34 ,  C23C16/24 ,  C23C16/452 ,  H01J37/32 ,  C23C16/54 ,  H01L21/683 ,  C23C16/455 ,  C23C16/509 ,  H01L21/677 ,  H01L21/67

Abstract: Embodiments of the present technology may include a method of forming a stack of semiconductor layers. The method may include depositing a first silicon oxide layer on a substrate. The method may also include depositing a first silicon layer on the first silicon oxide layer. The method may include depositing a first silicon nitride layer on the first silicon layer. The method may further include depositing a second silicon layer on the first silicon nitride layer. In addition, the method may include depositing a stress layer on a side of the substrate opposite a side of the substrate with the first silicon oxide layer. The operations may form a structure of semiconductor layers, where the structure includes the first silicon oxide layer, the first silicon layer, the first silicon nitride layer, the second silicon layer, the substrate, and the stress layer. Other methods of reducing stress are described.

公开(公告)号：US20190013250A1

公开(公告)日：2019-01-10

申请号：US16026598

申请日：2018-07-03

Applicant: Applied Materials, Inc.

Inventor： Liyan Miao ,  Chentsau Ying ,  Xinhai Han ,  Long Lin

IPC: H01L21/66 ,  H01L21/02 ,  H01L21/3205 ,  C23C16/52 ,  C23C16/34 ,  C23C16/24 ,  C23C16/40

Abstract: Embodiments of the present technology may include a method of forming a stack of semiconductor layers. The method may include depositing a first silicon oxide layer on a substrate. The method may also include depositing a first silicon layer on the first silicon oxide layer. The method may further include depositing a first silicon nitride layer on the first silicon layer. Depositing the first silicon nitride layer or a stress layer may include reducing stress in at least one of the first silicon layer, the first silicon oxide layer, or the substrate. In addition, the method may include depositing a second silicon layer on the first silicon nitride layer. The operations may form the stack of semiconductor layers, where the stack includes the first silicon oxide layer, the first silicon layer, the first silicon nitride layer, and the second silicon layer.

公开(公告)号：US09343309B1

公开(公告)日：2016-05-17

申请号：US14657693

申请日：2015-03-13

Applicant: APPLIED MATERIALS, INC.

Inventor： Mangesh Bangar ,  Liyan Miao ,  Huixiong Dai

IPC: H01L21/033 ,  H01L21/471 ,  H01L21/473 ,  H01L21/308

CPC classification number: H01L21/0337 ,  H01L21/0223 ,  H01L21/02238 ,  H01L21/3086 ,  H01L21/3088 ,  H01L21/32 ,  H01L21/471 ,  H01L21/473

Abstract: Methods of laterally oxidizing features of a patterned substrate are described. A capping layer may be disposed above lateral features to laterally confine the oxidation. The oxidizable features may be material patterned near the optical resolution of a photolithography system using a high-resolution photomask. The oxidizable features may be wider than the spaces between the oxidizable features and may be about three times the width of the spaces. Oxidized portions may be formed on either side of repeated oxidizable features. The unoxidized portions may then be removed as part of a self-aligned double patterning (SADP) process. A gapfill layer deposited thereon may be etched or polished back to form alternating fill and non-sacrificial features.

Abstract translation: 描述了图案化衬底的横向氧化特征的方法。 覆盖层可以设置在横向特征上方以横向限制氧化。 可氧化特征可以是使用高分辨率光掩模的光刻系统的光学分辨率附近的材料图案。 可氧化特征可以比可氧化特征之间的空间宽，并且可以是空间宽度的大约三倍。 可以在重复的可氧化特征的任一侧上形成氧化部分。 然后可以将非氧化部分作为自对准双重图案化（SADP）工艺的一部分移除。 可以将沉积在其上的间隙填充层进行蚀刻或抛光以形成交替的填充和非牺牲特征。