Method, system and device for non-volatile memory device operation

    公开(公告)号:US10096361B2

    公开(公告)日:2018-10-09

    申请号:US14826081

    申请日:2015-08-13

    申请人: ARM Ltd.

    IPC分类号: G11C11/00 G11C13/00 G11C14/00

    摘要: Disclosed are methods, systems and devices for operation of non-volatile memory devices. In one aspect, a non-volatile memory device may be placed in any one of multiple memory states in a write operation by controlling a current and a voltage applied to terminals of the non-volatile memory device. For example, a write operation may apply a programming signal across terminals of non-volatile memory device having a particular current and a particular voltage for placing the non-volatile memory device in a particular memory state.

    Memory write driver, method and system
    4.
    发明授权
    Memory write driver, method and system 有权
    内存写驱动,方法和系统

    公开(公告)号:US09514814B1

    公开(公告)日:2016-12-06

    申请号:US14826110

    申请日:2015-08-13

    申请人: ARM Ltd.

    IPC分类号: G11C13/00

    摘要: Disclosed are methods, systems and devices for operation of non-volatile memory devices. In one aspect, a non-volatile memory device may be placed in any one of multiple memory states in a write operation by controlling a current and a voltage applied to terminals of the non-volatile memory device. For example, a write operation may apply a programming signal across terminals of non-volatile memory device having a particular current and a particular voltage for placing the non-volatile memory device in a particular memory state.

    摘要翻译: 公开了用于操作非易失性存储器件的方法,系统和设备。 在一个方面,通过控制施加到非易失性存储器件的端子的电流和电压,可以在写入操作中将多个存储器状态中的任何一个置于非易失性存储器件中。 例如,写入操作可以在具有特定电流和特定电压的非易失性存储器件的端子上施加编程信号,以将非易失性存储器件置于特定存储器状态。

    Memory write driver, method and system

    公开(公告)号:US10529420B2

    公开(公告)日:2020-01-07

    申请号:US15904848

    申请日:2018-02-26

    申请人: ARM Ltd.

    IPC分类号: G11C13/00 G11C11/56

    摘要: Disclosed are methods, systems and devices for operation of non-volatile memory devices. In one aspect, a non-volatile memory device may be placed in any one of multiple memory states in a write operation by controlling a current and a voltage applied to terminals of the non-volatile memory device. For example, a write operation may apply a programming signal across terminals of non-volatile memory device having a particular current and a particular voltage for placing the non-volatile memory device in a particular memory state.

    METHOD, SYSTEM AND DEVICE FOR NON-VOLATILE MEMORY DEVICE OPERATION
    8.
    发明申请
    METHOD, SYSTEM AND DEVICE FOR NON-VOLATILE MEMORY DEVICE OPERATION 审中-公开
    用于非易失性存储器件操作的方法,系统和装置

    公开(公告)号:US20170047116A1

    公开(公告)日:2017-02-16

    申请号:US14826081

    申请日:2015-08-13

    申请人: ARM Ltd.

    IPC分类号: G11C13/00

    摘要: Disclosed are methods, systems and devices for operation of non-volatile memory devices. In one aspect, a non-volatile memory device may be placed in any one of multiple memory states in a write operation by controlling a current and a voltage applied to terminals of the non-volatile memory device. For example, a write operation may apply a programming signal across terminals of non-volatile memory device having a particular current and a particular voltage for placing the non-volatile memory device in a particular memory state.

    摘要翻译: 公开了用于操作非易失性存储器件的方法,系统和设备。 在一个方面,通过控制施加到非易失性存储器件的端子的电流和电压,可以在写入操作中将多个存储器状态中的任何一个置于非易失性存储器件中。 例如,写入操作可以在具有特定电流和特定电压的非易失性存储器件的端子上施加编程信号,以将非易失性存储器件置于特定存储器状态。

    Sense amplifier
    9.
    发明授权

    公开(公告)号:US10043559B2

    公开(公告)日:2018-08-07

    申请号:US15695624

    申请日:2017-09-05

    申请人: ARM Ltd.

    摘要: Broadly speaking, embodiments of the present techniques provide an amplification circuit comprising a sense amplifier and at least one Correlated Electron Switch (CES) configured to provide a signal to the sense amplifier. The sense amplifier outputs an amplified version of the input signal depending on the signal provided by the CES element. The signal provided by the CES element depends on the state of the CES material. The CES element provides a stable impedance to the sense amplifier, which may improve the reliability of reading data from the bit line, and reduce the number of errors introduced during the reading.