公开(公告)号：US20240211291A1

公开(公告)日：2024-06-27

申请号：US18088962

申请日：2022-12-27

Applicant: ADVANCED MICRO DEVICES, INC. ,  ATI TECHNOLOGIES ULC

Inventor： Yuping Shen ,  Min Zhang ,  Yinan Jiang ,  Jeffrey G. Cheng

IPC: G06F9/455 ,  G06F9/50

CPC classification number: G06F9/45558 ,  G06F9/5077 ,  G06F2009/4557

Abstract: A host processing system assigns unequal time slices at a parallel processor to virtual functions based on profiles of applications executing at the virtual functions and an available budget of the parallel processor. The host processing system calculates a world switch cycle interval and assesses an available processing budget of the parallel processor. The available budget indicates the amount of graphics processing time the parallel processor has not yet allocated to virtual functions for each world switch cycle interval.

公开(公告)号：US20240108978A1

公开(公告)日：2024-04-04

申请号：US17955651

申请日：2022-09-29

Applicant: ADVANCED MICRO DEVICES, INC. ,  ATI TECHNOLOGIES ULC

Inventor： Jeffrey G. Cheng ,  Yuping Shen ,  Mikhail Mironov ,  Min Zhang

IPC: A63F13/355 ,  A63F13/358 ,  H04N19/132

CPC classification number: A63F13/355 ,  A63F13/358 ,  H04N19/132

Abstract: A remote display synchronization technique preserves the presence of a local display device for a remotely-rendered video stream. A server and a client device cooperate to dynamically determine a target frame rate for a stream of rendered frames suitable for the current capacities of the server and the client device and networking conditions. The server generates from this target frame rate a synchronization signal that serves as timing control for the rendering process. The client device may provide feedback to instigate a change in the target frame rate, and thus a corresponding change in the synchronization signal. In this approach, the rendering frame rate and the encoding frequency may be “synchronized” in a manner consistent with the capacities of the server, the network, and the client device, resulting in generation, encoding, transmission, decoding, and presentation of a stream of frames that mitigates missed encoding of frames while providing acceptable latency.

公开(公告)号：US11836091B2

公开(公告)日：2023-12-05

申请号：US16176431

申请日：2018-10-31

Applicant: ADVANCED MICRO DEVICES, INC. ,  ATI TECHNOLOGIES ULC

Inventor： Anthony Asaro ,  Jeffrey G. Cheng ,  Anirudh R. Acharya

IPC: G06F12/10 ,  G06F9/455 ,  G06F12/1009

CPC classification number: G06F12/1009 ,  G06F9/45558 ,  G06F2009/45583 ,  G06F2212/657

Abstract: A processor supports secure memory access in a virtualized computing environment by employing requestor identifiers at bus devices (such as a graphics processing unit) to identify the virtual machine associated with each memory access request. The virtualized computing environment uses the requestor identifiers to control access to different regions of system memory, ensuring that each VM accesses only those regions of memory that the VM is allowed to access. The virtualized computing environment thereby supports efficient memory access by the bus devices while ensuring that the different regions of memory are protected from unauthorized access.

公开(公告)号：US20240211309A1

公开(公告)日：2024-06-27

申请号：US18085902

申请日：2022-12-21

Applicant: ATI TECHNOLOGIES ULC ,  ADVANCED MICRO DEVICES, INC.

Inventor： Ahmed M. Abdelkhalek ,  Rutao Zhang ,  Min Zhang ,  Yinan Jiang ,  Jeffrey G. Cheng ,  Yuping Shen ,  Mikhail Mironov

IPC: G06F9/48 ,  G06F9/455

CPC classification number: G06F9/4887 ,  G06F9/45558 ,  G06F2009/4557

Abstract: A parallel processor is configured to enforce job limits for virtual functions to facilitate an expected quality of service for each of the virtual functions assigned to a virtual machine executing at the processing unit. A scheduler schedules well-behaving virtual functions prior to badly-behaving virtual functions to prevent badly-behaving virtual functions from consuming a disproportionate share of hardware resources, thereby mitigating an impact of the badly-behaving virtual functions on the quality of service of the well-behaving virtual functions.

公开(公告)号：US20240211290A1

公开(公告)日：2024-06-27

申请号：US18088955

申请日：2022-12-27

Applicant: ADVANCED MICRO DEVICES, INC. ,  ATI TECHNOLOGIES ULC

Inventor： Yuping Shen ,  Min Zhang ,  Yinan Jiang ,  Jeffrey G. Cheng

IPC: G06F9/455

CPC classification number: G06F9/45558 ,  G06F9/45545 ,  G06F2009/45579

Abstract: A processing system aligns rendering timing of an application executing at a guest virtual function to world switch timing of a host virtual machine. The host virtual machine sets a world switch interval based on a number of virtual functions (VFs) that share the parallel processor and a target maximum frame rate. The processing system delays submission of jobs for a VF to the parallel processor by an offset with respect to the world switch timing to ensure that the application starts generating a job for the parallel processor before the VF gains a time slice so the job will be ready for the parallel processor when the VF gains the time slice.

公开(公告)号：US20240168785A1

公开(公告)日：2024-05-23

申请号：US17992533

申请日：2022-11-22

Applicant: ATI TECHNOLOGIES ULC

Inventor： Jeffrey G. Cheng

IPC: G06F9/455

CPC classification number: G06F9/45545

Abstract: In response to a notification from one or more virtual machines, a host with access to a physical function of a virtualized display device utilizes the physical function to directly access a frame memory of the virtualized display device associated with the notifying virtual machine(s). The host generates a composited frame for display, via the virtualized display device or otherwise, by selecting rendered frames from one or more of the notifying virtual machines.

公开(公告)号：US10310985B2

公开(公告)日：2019-06-04

申请号：US15633083

申请日：2017-06-26

Applicant: ATI Technologies ULC

Inventor： Dhirendra Partap Singh Rana ,  Conrad Lai ,  Jeffrey G. Cheng

IPC: G06F12/02 ,  G06F12/10 ,  G06F12/1072

Abstract: Systems, apparatuses, and methods for accessing and managing memories are disclosed herein. In one embodiment, a system includes at least first and second processors and first and second memories. The first processor maintains a request log with entries identifying requests that have been made to pages stored in the second memory. The first processor generates an indication for the second processor to process the request log when the number of entries in the request log reaches a programmable threshold. The second processor dynamically adjusts the programmable threshold based on one or more first conditions. The second processor also processes the request log responsive to detecting the indication. Additionally, the second processor determines whether to migrate pages from the second memory to the first memory based on one or more second conditions.

公开(公告)号：US10198283B2

公开(公告)日：2019-02-05

申请号：US15348225

申请日：2016-11-10

Applicant: ATI Technologies ULC ,  Advanced Micro Devices (Shanghai) Co., LTD.

Inventor： Jeffrey G. Cheng ,  Yinan Jiang ,  Guangwen Yang ,  Kelly Donald Clark Zytaruk ,  LingFei Liu ,  XiaoWei Wang

IPC: G06F9/455 ,  G06T1/20

Abstract: A request is sent from a new virtual function (VF) to a physical function for requesting the initialization of the new VF. The controlling physical function and the new VF establish a two-way communication channel that to start and end the VF's exclusive accesses to registers in a configuration space. The physical function uses a timing control to monitor that exclusive register access by the new VF is completed within a predetermined time period. The new VF is only granted a predetermined time period of exclusive access to complete its initialization process. If the exclusive access period is timed out, the controlling physical function can terminate the VF to prevent GPU stalls.

公开(公告)号：US12105623B2

公开(公告)日：2024-10-01

申请号：US16225608

申请日：2018-12-19

Applicant: ATI TECHNOLOGIES ULC

Inventor： Anthony Asaro ,  Philip Ng ,  Jeffrey G. Cheng

IPC: G06F12/02 ,  G06F12/1045 ,  G06T1/20 ,  G06T1/60

CPC classification number: G06F12/0292 ,  G06F12/1054 ,  G06T1/20 ,  G06T1/60 ,  G06F2212/1044 ,  G06F2212/657

Abstract: An apparatus includes a graphics processing unit (GPU) and a frame buffer. The frame buffer is coupled to the GPU. Based upon initialization of a virtual function, a plurality of pages are mapped into a virtual frame buffer. The plurality of pages are mapped into the virtual frame buffer by using a graphics input/output memory management unit (GIOMMU) and an associated page table.

公开(公告)号：US20180373641A1

公开(公告)日：2018-12-27

申请号：US15633083

申请日：2017-06-26

Applicant: ATI Technologies ULC

Inventor： Dhirendra Partap Singh Rana ,  Conrad Lai ,  Jeffrey G. Cheng

IPC: G06F12/10 ,  G06F12/02

Abstract: Systems, apparatuses, and methods for accessing and managing memories are disclosed herein. In one embodiment, a system includes at least first and second processors and first and second memories. The first processor maintains a request log with entries identifying requests that have been made to pages stored in the second memory. The first processor generates an indication for the second processor to process the request log when the number of entries in the request log reaches a programmable threshold. The second processor dynamically adjusts the programmable threshold based on one or more first conditions. The second processor also processes the request log responsive to detecting the indication. Additionally, the second processor determines whether to migrate pages from the second memory to the first memory based on one or more second conditions.