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公开(公告)号：US20240105798A1
公开(公告)日：2024-03-28
申请号：US17935652
申请日：2022-09-27
申请人： Abhishek A. Sharma , Tahir Ghani , Anand S. Murthy , Elliot Tan , Shem Ogadhoh , Sagar Suthram , Pushkar Sharad Ranade , Wilfred Gomes
发明人： Abhishek A. Sharma , Tahir Ghani , Anand S. Murthy , Elliot Tan , Shem Ogadhoh , Sagar Suthram , Pushkar Sharad Ranade , Wilfred Gomes
IPC分类号： H01L29/423 , H01L29/775 , H01L29/78 , H01L29/786
CPC分类号： H01L29/42392 , H01L29/775 , H01L29/785 , H01L29/78696 , H01L2029/7858
摘要： An example IC device formed using trim patterning as described herein may include a support structure, a first elongated structure (e.g., a first fin or nanoribbon) and a second elongated structure (e.g., a second fin or nanoribbon), proximate to an end of the first elongated structure. An angle between a projection of the first elongated structure on the support structure and an edge of the support structure may be between about 5 and 45 degrees, while an angle between a projection of the second elongated structure on the support structure and the edge of the support structure may be less than about 15 degrees.
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公开(公告)号：US08778605B2
公开(公告)日：2014-07-15
申请号：US13762083
申请日：2013-02-07
申请人： Shem Ogadhoh , Raguraman Venkatesan , Kevin J. Hooker , Sungwon Kim , Bin Hu , Vivek Singh , Bikram Baidya , Prasad Narendra Atkar , Seongtae Jeong
发明人： Shem Ogadhoh , Raguraman Venkatesan , Kevin J. Hooker , Sungwon Kim , Bin Hu , Vivek Singh , Bikram Baidya , Prasad Narendra Atkar , Seongtae Jeong
摘要： Described herein is mask design and modeling for a set of masks to be successively imaged to print a composite pattern on a substrate, such as a semiconductor wafer. Further described herein is a method of double patterning a substrate with the set of masks. Also described herein is a method of correcting a drawn pattern of one of the mask levels based on a predicted pattern contour of the other of the mask levels. Also described herein is a method of modeling a resist profile contour for a mask level in which photoresist is applied onto a inhomogeneous substrate, as well as method of predicting a resist profile of a Boolean operation of two masks.
摘要翻译： 这里描述的是要连续成像以在诸如半导体晶片的衬底上打印复合图案的一组掩模的掩模设计和建模。 本文进一步描述的是使用该组掩模对衬底进行双重图案化的方法。 这里还描述了一种基于掩模级别中的另一个的预测图案轮廓来校正掩模级中的一个的绘制图案的方法。 本文还描述了一种对光致抗蚀剂施加到非均匀衬底上的掩模级的抗蚀剂轮廓轮廓建模方法，以及预测两个掩模的布尔运算的抗蚀剂轮廓的方法。
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公开(公告)号：US08404403B2
公开(公告)日：2013-03-26
申请号：US12824037
申请日：2010-06-25
申请人： Shem Ogadhoh , Raguraman Venkatesan , Kevin J. Hooker , Sungwon Kim , Bin Hu , Vivek Singh , Bikram Baidya , Prasad Narendra Atkar , Seongtae Jeong
发明人： Shem Ogadhoh , Raguraman Venkatesan , Kevin J. Hooker , Sungwon Kim , Bin Hu , Vivek Singh , Bikram Baidya , Prasad Narendra Atkar , Seongtae Jeong
IPC分类号： G03F1/68
摘要： Described herein is mask design and modeling for a set of masks to be successively imaged to print a composite pattern on a substrate, such as a semiconductor wafer. Further described herein is a method of double patterning a substrate with the set of masks. Also described herein is a method of correcting a drawn pattern of one of the mask levels based on a predicted pattern contour of the other of the mask levels. Also described herein is a method of modeling a resist profile contour for a mask level in which photoresist is applied onto a inhomogeneous substrate, as well as method of predicting a resist profile of a Boolean operation of two masks.
摘要翻译： 这里描述的是要连续成像以在诸如半导体晶片的衬底上打印复合图案的一组掩模的掩模设计和建模。 本文进一步描述的是使用该组掩模对衬底进行双重图案化的方法。 这里还描述了一种基于掩模级别中的另一个的预测图案轮廓来校正掩模级中的一个的绘制图案的方法。 本文还描述了一种对光致抗蚀剂施加到非均匀衬底上的掩模级的抗蚀剂轮廓轮廓建模方法，以及预测两个掩模的布尔运算的抗蚀剂轮廓的方法。
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公开(公告)号：US20060095887A1
公开(公告)日：2006-05-04
申请号：US10977421
申请日：2004-10-29
申请人： Robert Bigwood , Shem Ogadhoh , Joseph Brandenburg
发明人： Robert Bigwood , Shem Ogadhoh , Joseph Brandenburg
IPC分类号： G06F17/50
CPC分类号： G03F1/36
摘要： A correction for photolithography masks used in semiconductor and micro electromechanical systems is described. The correction is based on process windows. In one example, the invention includes evaluating a segment of an idealized photolithography mask at a plurality of different possible process variable values to estimate a corresponding plurality of different photoresist edge positions, comparing the estimated edge positions to a minimum critical dimension, and moving the segment on the idealized photolithography mask if the estimated edge positions do not satisfy the minimum critical dimension.
摘要翻译： 描述了半导体和微机电系统中使用的光刻掩模的校正。 校正是基于过程窗口。 在一个示例中，本发明包括以多个不同的可能过程变量值来评估理想化的光刻掩模的段，以估计相应的多个不同的光刻胶边缘位置，将估计边缘位置与最小临界尺寸进行比较，以及移动该段 在理想的光刻掩模上，如果估计的边缘位置不满足最小临界尺寸。
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公开(公告)号：US20110318672A1
公开(公告)日：2011-12-29
申请号：US12824037
申请日：2010-06-25
申请人： Shem Ogadhoh , Raguraman Venkatesan , Kevin J. Hooker , Sungwon Kim , Bin Hu , Vivek Singh , Bikram Baidya , Prasad Narendra Atkar , Seongtae Jeong
发明人： Shem Ogadhoh , Raguraman Venkatesan , Kevin J. Hooker , Sungwon Kim , Bin Hu , Vivek Singh , Bikram Baidya , Prasad Narendra Atkar , Seongtae Jeong
摘要： Described herein is mask design and modeling for a set of masks to be successively imaged to print a composite pattern on a substrate, such as a semiconductor wafer. Further described herein is a method of double patterning a substrate with the set of masks. Also described herein is a method of correcting a drawn pattern of one of the mask levels based on a predicted pattern contour of the other of the mask levels. Also described herein is a method of modeling a resist profile contour for a mask level in which photoresist is applied onto a inhomogeneous substrate, as well as method of predicting a resist profile of a Boolean operation of two masks.
摘要翻译： 这里描述的是要连续成像以在诸如半导体晶片的衬底上打印复合图案的一组掩模的掩模设计和建模。 本文进一步描述的是使用该组掩模对衬底进行双重图案化的方法。 这里还描述了一种基于掩模级别中的另一个的预测图案轮廓来校正掩模级中的一个的绘制图案的方法。 本文还描述了一种对光致抗蚀剂施加到非均匀衬底上的掩模级的抗蚀剂轮廓轮廓建模方法，以及预测两个掩模的布尔运算的抗蚀剂轮廓的方法。
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公开(公告)号：US07470492B2
公开(公告)日：2008-12-30
申请号：US10977421
申请日：2004-10-29
IPC分类号： G03F9/00
CPC分类号： G03F1/36
摘要： A correction for photolithography masks used in semiconductor and micro electromechanical systems is described. The correction is based on process windows. In one example, the invention includes evaluating a segment of an idealized photolithography mask at a plurality of different possible process variable values to estimate a corresponding plurality of different photoresist edge positions, comparing the estimated edge positions to a minimum critical dimension, and moving the segment on the idealized photolithography mask if the estimated edge positions do not satisfy the minimum critical dimension.
摘要翻译： 描述了半导体和微机电系统中使用的光刻掩模的校正。 校正是基于过程窗口。 在一个示例中，本发明包括以多个不同的可能过程变量值来评估理想化的光刻掩模的段，以估计相应的多个不同的光刻胶边缘位置，将估计边缘位置与最小临界尺寸进行比较，以及移动该段 在理想的光刻掩模上，如果估计的边缘位置不满足最小临界尺寸。
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