-
公开(公告)号：US20080239597A1
公开(公告)日：2008-10-02
申请号：US11575727
申请日：2005-09-14
申请人： Adrianus Van Bezooijen , Ronald Koster , Rob Mathijs Heeres , Dmitry Paviovich Prikhodko , Bart Balm
发明人： Adrianus Van Bezooijen , Ronald Koster , Rob Mathijs Heeres , Dmitry Paviovich Prikhodko , Bart Balm
CPC分类号： H03F1/52 , H03F2200/435 , H03F2200/471
摘要： A peak voltage protection circuit for protecting an associated High Voltage NPN transistor (T3) against breakdown, the protection circuit comprising a Low Voltage NPN element (T15) for sensing a sensor voltage related to a base-collector voltage of the associated High Voltage NPN transistor (T3). The circuit further comprises an activation circuit for limiting the base-collector voltage of the associated High Voltage NPN transistor (T3) upon triggering. The Low Voltage NPN element (15) is coupled to the activation circuit for triggering it upon the sensor voltage exceeding a breakdown voltage of the Low Voltage NPN transistor (T15).
摘要翻译： 一种用于保护相关联的高电压NPN晶体管（T 3）免于击穿的峰值电压保护电路，所述保护电路包括用于感测与相关联的高电压的基极 - 集电极电压相关的传感器电压的低电压NPN元件（T 15） NPN晶体管（T 3）。 电路还包括用于在触发时限制相关联的高电压NPN晶体管（T 3）的基极 - 集电极电压的激活电路。 低电压NPN元件（15）耦合到激活电路，以在传感器电压超过低电压NPN晶体管（T15）的击穿电压时触发它。
-
公开(公告)号：US20060186964A1
公开(公告)日：2006-08-24
申请号：US10560638
申请日：2004-06-15
IPC分类号： H03F3/04
CPC分类号： H03F3/21 , H03F1/0261 , H03F1/30 , H03F3/3432 , H03F2200/453 , H03F2200/462
摘要： A detection circuit for detecting the output power of a power amplifier comprises a first current minor transistor (Ti 1) having a base, which is connectable to a power transistor (T10), and a collector, a RF detection means (RF-det) for detecting the RF current flowing through the current mirror transistor (T11). Said RF detection means (RFdet) is connected to the collector of said first current mirror transistor (T11). Said detection circuit further comprises a biasing means (bias-RF-det) for biasing said RF detection means (RF-det), wherein said biasing means is connected to said collector of said first current mirror (T11) and said RF detection means (RF-det).
摘要翻译： 用于检测功率放大器的输出功率的检测电路包括具有可连接到功率晶体管（T10）的基极的第一电流次级晶体管（Ti 1）和集电极，RF检测装置（RF-det ），用于检测流过电流镜晶体管（T11）的RF电流。 所述RF检测装置（RFdet）连接到所述第一电流镜晶体管（T11）的集电极。 所述检测电路还包括用于偏置所述RF检测装置（RF-det）的偏置装置（偏置RF-det），其中所述偏置装置连接到所述第一电流镜（T11）的所述集电极，并且所述RF检测装置 （RF-det）。
-
公开(公告)号：US07274206B2
公开(公告)日：2007-09-25
申请号：US10560638
申请日：2004-06-15
申请人： Dmitry Pavlovich Prikhodko , Adrianus Van Bezooijen , Christophe Chanlo , John Joseph Hug , Ronald Koster
发明人： Dmitry Pavlovich Prikhodko , Adrianus Van Bezooijen , Christophe Chanlo , John Joseph Hug , Ronald Koster
IPC分类号： G01R31/26
CPC分类号： H03F3/21 , H03F1/0261 , H03F1/30 , H03F3/3432 , H03F2200/453 , H03F2200/462
摘要： A detection circuit for detecting the output power of a power amplifier comprises a first current minor transistor (Ti 1) having a base, which is connectable to a power transistor (T10), and a collector, a RF detection means (RF-det) for detecting the RF current flowing through the current mirror transistor (T11). Said RF detection means (RFdet) is connected to the collector of said first current mirror transistor (T11). Said detection circuit further comprises a biasing means (bias-RF-det) for biasing said RF detection means (RF-det), wherein said biasing means is connected to said collector of said first current mirror (T11) and said RF detection means (RF-det).
摘要翻译： 用于检测功率放大器的输出功率的检测电路包括具有可连接到功率晶体管（T10）的基极的第一电流次级晶体管（Ti 1）和集电极，RF检测装置（RF-det ），用于检测流过电流镜晶体管（T11）的RF电流。 所述RF检测装置（RFdet）连接到所述第一电流镜晶体管（T11）的集电极。 所述检测电路还包括用于偏置所述RF检测装置（RF-det）的偏置装置（偏置RF-det），其中所述偏置装置连接到所述第一电流镜（T11）的所述集电极，并且所述RF检测装置 （RF-det）。
-
公开(公告)号：US08111111B2
公开(公告)日：2012-02-07
申请号：US11719535
申请日：2005-11-16
IPC分类号： H03H7/38
CPC分类号： H03H7/38 , H04B1/0458 , H04B1/18
摘要： Device (5) comprising controlled matching stages (10) for matching second stages such as antenna stages (2) to first stages such as power amplifier stages (1) get a simple construction by providing the controlled matching stages (10) with deriving means (11) for deriving first signals and second signals from output signals of the first stages, with detecting means (12) for detecting phases between the first signals and the second signals, and with controlling means (13) for controlling adjustable impedance networks (14) in response to said detecting for said matching. The deriving means (11) comprise elements (21) such as passive elements such as inductors and capacitors, with the first signals being the output signals and the second signals being derived via the elements (21). The detecting means (12) comprise phase detectors (22-24) made of first and second limiters (22,23) for limiting the first and second signals and mixers (24) for mixing the limited first and second signals. The controlling means (13) comprise analog-to-digital converters (25) such as limiters and digital circuits (26) such as up-down counters.
摘要翻译： 包括用于将诸如天线级（2）的第二级与诸如功率放大器级（1）的第一级匹配的受控匹配级（10）的装置（5）通过提供受控匹配级（10）与导出装置 11），用于通过用于检测第一信号和第二信号之间的相位的检测装置（12）以及用于控制可调阻抗网络（14）的控制装置（13）来从第一级的输出信号导出第一信号和第二信号， 响应于所述匹配的所述检测。 导出装置（11）包括元件（21），诸如诸如电感器和电容器的无源元件，其中第一信号是输出信号，第二信号通过元件（21）导出。 检测装置（12）包括由第一和第二限制器（22,23）制成的相位检测器（22-24），用于限制第一和第二信号和混合器（24），用于混合有限的第一和第二信号。 控制装置（13）包括诸如限制器和数字电路（26）的诸如升降计数器的模数转换器（25）。
-
5.发明授权DC-offset correction circuit having a DC control loop and a DC blocking circuit 有权DC偏移校正电路具有DC控制回路和DC阻断电路公开(公告)号：US07233631B2
公开(公告)日：2007-06-19
申请号：US09988943
申请日：2001-11-19
IPC分类号： H04L25/06
CPC分类号： H04B1/30
摘要： A DC-offset correction circuit (I1, Q1) for a low-IF or zero-IF receiver, comprises a DC-offset control loop (O1, O2) embodied by: a summing device (9-1, 9-2) having a signal path input (10-1, 10-2), a DC control input (11-1, 11-2), and a summing output (12-1, 12-2); and an offset determining means (15-1, 15-2) coupled between the summing output (12-1, 12-2) and the DC control input of the summing device (9-1, 9-2). The DC-offset correction circuit (I1, Q1) further comprises a DC blocking circuit (17-1, 17-2) coupled to the summing output (12-1, 12-2) of the summing device (9-1, 9-2) and having a DC blocking output (18-1, 18-2) for providing an offset corrected output signal. The DC-offset control loop (O1, O2) and the DC blocking circuit (17-1, 17-2) advantageously interact in correcting DC offset.
摘要翻译： 用于低中频或零中频接收机的直流偏移校正电路（I 1，Q 1）包括一个直流偏移控制回路（O 1，O 2），其包括：加法装置（9-1,9 2）具有信号路径输入（10-1,10-2），DC控制输入（11-1,11-2）和求和输出（12-1,12-2）; 以及耦合在求和输出（12-1,12-2）和求和装置（9-1,9-2）的DC控制输入之间的偏移确定装置（15-1,15-2）。 DC偏移校正电路（I 1，Q 1）还包括耦合到求和装置（9-1）的求和输出（12-1,12-2）的DC阻塞电路（17-1,17-2） ，9-2）并且具有用于提供偏移校正输出信号的DC阻塞输出（18-1,18-2）。 DC偏移控制回路（O 1，O 2）和DC阻塞电路（17-1,17-2）有利地在校正DC偏移方面进行交互。
-
公开(公告)号：US6009126A
公开(公告)日：1999-12-28
申请号：US904381
申请日：1997-08-01
CPC分类号： H03D3/008 , H04B1/30 , H03D2200/0084
摘要： Known is a zero intermediate frequency receiver or zero-IF receiver in which DC-offset correction is done in the I- and Q-paths, after mixing down of the received RF-signal or of an IF-signal. Such a DC-offset correction is not sufficient for high gain I- and Q-paths, particularly not in pagers for receiving long messages. Furthermore, no optimal power saving is achieved if such a receiver alternately operates in receive mode and sleep mode. A zero intermediate frequency receiver is proposed in which DC-offset correction is distributed over the high gain I- and Q-path. Preferably, blocking means are provided between DC-offset correction circuits and low pass filters in the I- and Q-path to prevent that an output signal of an upstream DC-offset correction circuit in the path excites a downstream low pass filter in the path during DC-offset correction. Herewith, considerable power savings are achieved.
摘要翻译： 已知的是零接收器或零中频接收器，其中，在接收的RF信号或IF信号混合之后，在I和Q路径中进行DC偏移校正。 这种DC偏移校正对于高增益I和Q路径是不够的，特别是不能用于接收长消息的寻呼机。 此外，如果这样的接收机在接收模式和睡眠模式下交替操作，则不能实现最佳功率节省。 提出了一种零中频接收机，其中DC偏移校正分布在高增益I和Q路径上。 优选地，在I-偏移校正电路和I路和Q路中的低通滤波器之间提供阻塞装置，以防止路径中的上游DC偏移校正电路的输出信号激发路径中的下游低通滤波器 在DC偏移校正期间。 因此，实现了相当大的功率节省。
-
公开(公告)号：US20130113677A1
公开(公告)日：2013-05-09
申请号：US13695396
申请日：2010-04-30
IPC分类号： H01Q1/50
CPC分类号： H01Q9/0442 , H03H7/40
摘要： A cheaper to produce, smaller and easy to drive adaptive antenna module is presented. The module comprises a signal path, an antenna, and a tuning circuit with two variable impedance elements. The tuning circuit operates over a restricted range of impedances and maintains the series resonance characteristic of the antenna.
摘要翻译： 提出了一种便宜的生产方式，体积更小，易于驾驶的自适应天线模块。 该模块包括信号路径，天线和具有两个可变阻抗元件的调谐电路。 调谐电路在有限的阻抗范围内工作，并保持天线的串联谐振特性。
-
公开(公告)号：US07482873B2
公开(公告)日：2009-01-27
申请号：US10527775
申请日：2003-08-04
IPC分类号： H03G3/10
CPC分类号： H03F1/32 , H03F1/0238 , H03F1/56 , H03F3/245 , H03G3/004 , H03G3/3042
摘要： A method and circuit for preserving linearity of a RF power amplifier, the power amplifier including a RF power output unit (4, 24, 62) having a characteristic drive level and fed by a supply voltage, comprising measuring the output voltage of the RF power output unit (4, 24, 62); comparing the measured output voltage to at least one threshold voltage to produce a control signal; and adapting the drive level or the supply voltage of the RF power output (4, 24, 62) unit by means of the control signal to operate the output unit below its saturation level. A method and circuit for stabilizing an antenna circuit comprising a RF power amplifier and a matching circuit by preserving linearity of a RF power amplifier, where the above power amplifier is used.
摘要翻译： 一种用于保持RF功率放大器的线性度的方法和电路，所述功率放大器包括具有特性驱动电平并由电源电压馈送的RF功率输出单元（4,24,62），包括测量RF功率的输出电压 输出单元（4,24,62）; 将测量的输出电压与至少一个阈值电压进行比较以产生控制信号; 以及通过所述控制信号调整所述RF功率输出（4,24,62）单元的驱动电平或所述电源电压以使所述输出单元低于其饱和电平。 一种用于通过保持使用上述功率放大器的RF功率放大器的线性来稳定包括RF功率放大器和匹配电路的天线电路的方法和电路。
-
公开(公告)号：US20080266021A1
公开(公告)日：2008-10-30
申请号：US11576807
申请日：2005-09-29
CPC分类号： H03H7/40 , H04B1/0458
摘要： The invention relates to an antenna which is coupled to an RF amplifier. Environmental conditions change the impedance of the antenna, which reduces output power, efficiency and linearity. A circuit is provided which is designed to detect the impedance of the antenna. With the measured impedance, impedance matching can be accomplished. The circuit for detecting the impedance detects the signal travelling from the RF amplifier to the antenna, and measures the peak voltage and the peak current of this signal. Furthermore, the phase difference between the voltage and the current is measured. The advantage of the circuit is its compactness allowing for an easy integration on a chip. Furthermore, an impedance matching circuit is suggested which makes use of the above circuit for detecting the impedance.
摘要翻译： 本发明涉及一种耦合到RF放大器的天线。 环境条件改变了天线的阻抗，从而降低了输出功率，效率和线性度。 提供了一种设计用于检测天线阻抗的电路。 通过测量的阻抗，可以实现阻抗匹配。 用于检测阻抗的电路检测从RF放大器行进到天线的信号，并测量该信号的峰值电压和峰值电流。 此外，测量电压和电流之间的相位差。 电路的优点是其紧凑性，可以轻松集成在芯片上。 此外，建议使用上述用于检测阻抗的电路的阻抗匹配电路。
-
公开(公告)号：US06233292B1
公开(公告)日：2001-05-15
申请号：US09099499
申请日：1998-06-18
IPC分类号： H04B1406
CPC分类号： H03J1/0008 , H03J7/04
摘要： A digital receiver has a local oscillator that provides a local oscillator signal, a frequency offset detector that provides a frequency offset signal that is representative of a difference between the local oscillator signal and a desired tuning frequency of the digital receiver, and a frequency controller that controls the frequency of the local oscillator on the basis of a stored control value. The frequency controller separately derives a short term drift compensation signal and a long term drift compensation signal from the frequency offset signal, at a first interval updates the stored control value on the basis of the derived short term drift compensation signal, and at a second interval updates the stored control value on the basis of the long term drift compensation signal. The first interval is substantially shorter than the second interval.
摘要翻译： 数字接收机具有提供本地振荡器信号的本地振荡器，提供表示本地振荡器信号与数字接收机的期望调谐频率之间的差异的频率偏移信号的频率偏移检测器，以及频率控制器， 基于存储的控制值来控制本地振荡器的频率。 频率控制器分别从频率偏移信号导出短期漂移补偿信号和长期漂移补偿信号，在第一间隔，基于导出的短期漂移补偿信号来更新存储的控制值，并且在第二间隔 基于长期漂移补偿信号更新存储的控制值。 第一间隔大大短于第二间隔。
-
-
-
-
-
-
-
-
-
搜索结果
25 条记录 (耗时 0.05 秒)
