公开(公告)号：US10318153B2

公开(公告)日：2019-06-11

申请号：US14576912

申请日：2014-12-19

Applicant: Advanced Micro Devices, Inc.

Inventor： Sergey Blagodurov ,  Mitesh Ramesh Meswani ,  Gabriel H. Loh ,  Mauricio Breternitz, Jr. ,  Mark Richard Nutter ,  John Robert Slice ,  David Andrew Roberts ,  Michael Ignatowski ,  Mark Henry Oskin

IPC: G06F3/06

Abstract: A processor modifies memory management mode for a range of memory locations of a multilevel memory hierarchy based on changes in an application phase of an application executing at a processor. The processor monitors the application phase (e.g., computation-bound phase, input/output phase, or memory access phase) of the executing application and in response to a change in phase consults a management policy to identify a memory management mode. The processor automatically reconfigures a memory controller and other modules so that a range of memory locations of the multilevel memory hierarchy are managed according to the identified memory management mode. By changing the memory management mode for the range of memory locations according to the application phase, the processor improves processing efficiency and flexibility.

公开(公告)号：US20160378667A1

公开(公告)日：2016-12-29

申请号：US14747933

申请日：2015-06-23

Applicant: Advanced Micro Devices, Inc.

Inventor： David Andrew Roberts ,  Mitesh R. Meswani ,  Sergey Blagodurov ,  Dmitri Yudanov ,  Indrani Paul

IPC: G06F12/08

CPC classification number: G06F12/0862 ,  G06F2212/6024

Abstract: A processor employs multiple prefetchers at a processor to identify patterns in memory accesses to different memory modules. The memory accesses can include transfers between the memory modules, and the prefetchers can prefetch data directly from one memory module to another based on patterns in the transfers. This allows the processor to efficiently organize data at the memory modules without direct intervention by software or by a processor core, thereby improving processing efficiency.

Abstract translation: 处理器在处理器中使用多个预取器来识别对不同存储器模块的存储器访问中的模式。 存储器访问可以包括存储器模块之间的传输，并且预取器可以基于传输中的模式将数据直接从一个存储器模块预取到另一个。 这允许处理器在存储器模块内有效地组织数据，而无需软件或处理器核心的直接干预，从而提高处理效率。

公开(公告)号：US20160179382A1

公开(公告)日：2016-06-23

申请号：US14576912

申请日：2014-12-19

Applicant: Advanced Micro Devices, Inc.

Inventor： Sergey Blagodurov ,  Mitesh Ramesh Meswani ,  Gabriel H. Loh ,  Mauricio Breternitz, JR. ,  Mark Richard Nutter ,  John Robert Slice ,  David Andrew Roberts ,  Michael Ignatowski ,  Mark Henry Oskin

IPC: G06F3/06

CPC classification number: G06F3/0604 ,  G06F3/061 ,  G06F3/0634 ,  G06F3/0673 ,  G06F3/0685

Abstract: A processor modifies memory management mode for a range of memory locations of a multilevel memory hierarchy based on changes in an application phase of an application executing at a processor. The processor monitors the application phase (e.g.,. computation-bound phase, input/output phase, or memory access phase) of the executing application and in response to a change in phase consults a management policy to identify a memory management mode. The processor automatically reconfigures a memory controller and other modules so that a range of memory locations of the multilevel memory hierarchy are managed according to the identified memory management mode. By changing the memory management mode for the range of memory locations according to the application phase, the processor improves processing efficiency and flexibility.

Abstract translation: 处理器基于在处理器上执行的应用的应用阶段的变化来修改多层存储器层级的一系列存储器位置的存储器管理模式。 处理器监视执行应用程序的应用阶段（例如，计算限制阶段，输入/输出阶段或存储器访问阶段）并且响应于阶段的改变来咨询管理策略以识别存储器管理模式。 处理器自动重新配置存储器控制器和其他模块，使得根据所识别的存储器管理模式来管理多级存储器层级的一系列存储器位置。 通过根据应用阶段改变存储器位置范围的存储器管理模式，处理器提高了处理效率和灵活性。