公开(公告)号：US11861781B2

公开(公告)日：2024-01-02

申请号：US17134744

申请日：2020-12-28

Applicant: ADVANCED MICRO DEVICES, INC. ,  ATI TECHNOLOGIES ULC ,  SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sreekanth Godey ,  Ashkan Hosseinzadeh Namin ,  Seunghun Jin ,  Teik-Chung Tan

IPC: G06F1/3228 ,  G06T15/00 ,  G06F1/3212 ,  G06F9/50 ,  G06F1/3215 ,  G06F9/30

CPC classification number: G06T15/005 ,  G06F1/3212 ,  G06F1/3215 ,  G06F1/3228 ,  G06F9/30098 ,  G06F9/5011

Abstract: The graphics processing unit (GPU) of a processing system transitions to a low-power state between frame rendering operations according to an inter-frame power off process, where GPU state information is stored on retention hardware. The retention hardware can include retention random access memory (RAM) or retention flip-flops. The retention hardware is operable in an active mode and a retention mode, where read/write operations are enabled at the retention hardware in the active mode and disabled in the retention mode, but data stored on the retention hardware is still retained in the retention mode. The retention hardware is placed in the retention state between frame rendering operations. The GPU transitions from its low-power state to its active state upon receiving an indication that a new frame is ready to be rendered and is restored using the GPU state information stored at the retention hardware.

公开(公告)号：US20240419481A1

公开(公告)日：2024-12-19

申请号：US18334363

申请日：2023-06-13

Applicant: Advanced Micro Devices, Inc. ,  ATI Technologies ULC

Inventor： Ashish Jain ,  Ashkan Hosseinzadeh Namin

IPC: G06F9/46

Abstract: An apparatus and method for efficiently performance among replicated functional blocks of an integrated circuit despite different circuit behavior amongst the functional blocks due to manufacturing variations. An integrated circuit includes multiple replicated functional blocks, each being a semiconductor die with an instantiated copy of particular integrated circuitry for processing a work block. One or more of the functional blocks of the integrated circuit belong in a different performance category or bin than other functional blocks due to manufacturing variations across semiconductor dies. A scheduler assigns work blocks to the functional blocks based on whether a functional block is from a high-performance bin and whether a workload of a work block is a computation intensive workload. The scheduler assigns work blocks work blocks marked as having a memory access intensive workload to functional blocks from a lower performance bin.

公开(公告)号：US11579876B2

公开(公告)日：2023-02-14

申请号：US17008006

申请日：2020-08-31

Applicant: ADVANCED MICRO DEVICES, INC. ,  ATI TECHNOLOGIES ULC

Inventor： Anirudh R. Acharya ,  Alexander Fuad Ashkar ,  Ashkan Hosseinzadeh Namin

IPC: G06F9/30 ,  G06F9/48 ,  G06F13/16 ,  G06F11/30 ,  G06F1/3296 ,  G06F9/54

Abstract: A method of save-restore operations includes monitoring, by a power controller of a parallel processor (such as a graphics processing unit), of a register bus for one or more register write signals. The power controller determines that a register write signal is addressed to a state register that is designated to be saved prior to changing a power state of the parallel processor from a first state to a second state having a lower level of energy usage. The power controller instructs a copy of data corresponding to the state register to be written to a local memory module of the parallel processor. Subsequently, the parallel processor receives a power state change signal and writes state register data saved at the local memory module to an off-chip memory prior to changing the power state of the parallel processor.

公开(公告)号：US11263044B2

公开(公告)日：2022-03-01

申请号：US16692856

申请日：2019-11-22

Applicant: ADVANCED MICRO DEVICES, INC. ,  ATI TECHNOLOGIES ULC

Inventor： Mangesh P. Nijasure ,  Michael Mantor ,  Ashkan Hosseinzadeh Namin ,  Louis Regniere

IPC: G06F9/48 ,  G06F9/50 ,  G06T1/20 ,  G06F1/324

Abstract: A graphics processing unit (GPU) adjusts a frequency of clock based on identifying a program thread executing at the processing unit, wherein the program thread is detected based on a workload to be executed. By adjusting the clock frequency based on the identified program thread, the processing unit adapts to different processing demands of different program threads. Further, by identifying the program thread based on workload, the processing unit adapts the clock frequency based on processing demands, thereby conserving processing resources.