公开(公告)号：US20230244049A1

公开(公告)日：2023-08-03

申请号：US17588105

申请日：2022-01-28

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Po-I WU ,  Ming-Fong JHONG

IPC: G02B6/43 ,  G02B6/42

CPC classification number: G02B6/43 ,  G02B6/4277 ,  G02B6/4284

Abstract: The present disclosure relates to an electronic device that includes a waveguide, a plurality of transceiving portions over the waveguide, and a cavity between the waveguide and the transceiving portions and connecting the waveguide with the transceiving portions. The cavity is configured for resonating of an electromagnetic wave from the waveguide or the transceiving portions.

公开(公告)号：US20180131094A1

公开(公告)日：2018-05-10

申请号：US15348854

申请日：2016-11-10

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Cheng-Yu HO ,  Chen-Chao WANG ,  Chun-Yen TING ,  Ming-Fong JHONG ,  Po-Chih PAN

IPC: H01Q9/04 ,  H01L23/66 ,  H01L23/538 ,  H01L25/065 ,  H01L23/552

CPC classification number: H01Q9/045 ,  H01L23/49816 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5386 ,  H01L23/5389 ,  H01L23/552 ,  H01L23/66 ,  H01L24/17 ,  H01L25/0657 ,  H01L2223/6677 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06572 ,  H01L2924/01028 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/1421 ,  H01L2924/3025 ,  H01Q9/0457 ,  H01Q13/10 ,  H01Q19/30 ,  H01Q21/28

Abstract: Various embodiments of the present disclosure relate to a semiconductor device package including a carrier, an electrical component, an antenna, a conductive pad and a conductive line. The carrier includes a top surface. The electrical component is disposed over the top surface of the carrier. The antenna is disposed over the top surface of the carrier and spaced away from the electrical component. The conductive pad is disposed over the top surface of the carrier and beneath the antenna, wherein the conductive pad includes a resonant structure. The conductive line is electrically connected to the electrical component and extends within the carrier. A part of the conductive line is beneath the antenna and the resonant structure of the conductive pad.

公开(公告)号：US20240055365A1

公开(公告)日：2024-02-15

申请号：US17886254

申请日：2022-08-11

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Po-I WU ,  Jung Jui KANG ,  Chang Chi LEE ,  Pao-Nan LEE ,  Ming-Fong JHONG

IPC: H01L23/552 ,  H01L23/48 ,  H01L23/66

CPC classification number: H01L23/552 ,  H01L23/481 ,  H01L23/66 ,  H01L2223/6616

Abstract: An electronic device is disclosed. The electronic device includes a first interconnection structure, and a first electronic component disposed over the first interconnection structure and having an active surface and a lateral surface. The electronic device also includes a power connection disposed between the first interconnection structure and the active surface of the first electronic component, and a first non-power connection extending along the lateral surface of the first electronic component and electrically connected to the first interconnection structure. The electronic device also includes a second non-power connection disposed between the first interconnection structure and the active surface of the first electronic component. The second non-power connection is configured to block an electromagnetic interference (EMI) between the power connection and the first non-power connection.

公开(公告)号：US20210202353A1

公开(公告)日：2021-07-01

申请号：US16732054

申请日：2019-12-31

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ming-Fong JHONG ,  Chen-Chao WANG ,  Hung-Chun KUO

IPC: H01L23/48 ,  H01L21/768 ,  H01L21/48 ,  H01L23/528 ,  H01L23/522

Abstract: A semiconductor device package includes a substrate, a first circuit layer and a second circuit layer. The first circuit layer is disposed on the substrate. The first circuit layer has a plurality of dielectric layers and a first through via penetrating the dielectric layers and electrically connected to the substrate. The second circuit layer is disposed on the first circuit layer. The second circuit layer has a plurality of dielectric layers and a second through via penetrating the dielectric layers and electrically connected to the first circuit layer.