公开(公告)号：US09911709B1

公开(公告)日：2018-03-06

申请号：US15335351

申请日：2016-10-26

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chun-Jun Zhuang ,  Wei-Hang Tai ,  Pin-Ha Chuang

IPC: H01L23/00 ,  H01L23/24 ,  H01L25/00 ,  H01L25/065

CPC classification number: H01L24/17 ,  H01L21/563 ,  H01L23/16 ,  H01L23/24 ,  H01L23/295 ,  H01L24/16 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/1403 ,  H01L2224/14517 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/1703 ,  H01L2224/17155 ,  H01L2224/17179 ,  H01L2224/17517 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/81815 ,  H01L2224/92225 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06568 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00

Abstract: A semiconductor device includes a first semiconductor die, a second semiconductor die and a plurality of supporting structures. The first semiconductor die includes a plurality of first bumps disposed adjacent to a first active surface thereof. The second semiconductor die includes a plurality of second bumps disposed adjacent to a second active surface thereof. The second bumps are bonded to the first bumps. The supporting structures are disposed between the first active surface of the first semiconductor die and the second active surface of the second semiconductor die. The supporting structures are electrically isolated and are disposed adjacent to a peripheral region of the second active surface of the second semiconductor die.

公开(公告)号：US11244909B2

公开(公告)日：2022-02-08

申请号：US16817407

申请日：2020-03-12

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Fan-Yu Min ,  Chen-Hung Lee ,  Wei-Hang Tai ,  Yuan-Tzuo Luo ,  Wen-Yuan Chuang ,  Chun-Cheng Kuo ,  Chin-Li Kao

IPC: H01L23/00 ,  H01L23/16 ,  H01L23/31 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56

Abstract: A package structure and a manufacturing method are provided. The package structure includes a wiring structure, a first electronic device and a second electronic device. The first electronic device is disposed on the wiring structure. The second electronic device is disposed on the wiring structure. The first electronic device and the second electronic device are disposed side by side. A gap between the first electronic device and the second electronic device is greater than or equal to about 150 μm.

公开(公告)号：US11107791B2

公开(公告)日：2021-08-31

申请号：US16354156

申请日：2019-03-14

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Fan-Yu Min ,  Chao-Hung Weng ,  Wei-Hang Tai ,  Chen-Hung Lee ,  Yu-Yuan Yeh

IPC: H01L23/48 ,  H01L25/065 ,  H01L23/31 ,  H01L23/00 ,  H01L25/00 ,  H01L21/56 ,  H01L23/538 ,  H01L21/768 ,  H01L21/288 ,  H01L21/48 ,  H01L21/683

Abstract: A semiconductor package structure includes a conductive structure, a first semiconductor chip, a second semiconductor chip, a first encapsulant and an upper semiconductor chip. The first semiconductor chip is electrically connected to the conductive structure. The first semiconductor chip includes at least one first conductive element disposed adjacent to a second surface thereof. The second semiconductor chip is electrically connected to the conductive structure and disposed next to the first semiconductor chip. The second semiconductor chip includes at least one second conductive element disposed adjacent to a second surface thereof. The first encapsulant is disposed on the conductive structure to cover the first semiconductor chip and the second semiconductor chip. The first conductive element and the second conductive element are exposed from the first encapsulant. The upper semiconductor chip is disposed on the first encapsulant and electrically connected to the first conductive element and the second conductive element.