-
公开(公告)号：US20080192146A1
公开(公告)日：2008-08-14
申请号：US10568873
申请日：2005-09-01
申请人： Akifumi Yamana , Katsumi Hoashi
发明人： Akifumi Yamana , Katsumi Hoashi
IPC分类号： H04N5/00
CPC分类号： H04N5/21
摘要： In the case of performing NR (noise reduction) and scaling on video signals, the NR buffer 104 is formed by, for example, five line memories. An NR section 103 and a scaling section 105 are controlled by a control section 108. The control section 108 controls the NR section 103 and the scaling section 105 such that video signals subjected to noise reduction by the NR section 103 and corresponding to one line are output from the NR section 103 to an arbitrary one of the line memories of the NR buffer 104 and video signals corresponding to a plurality of lines and stored in the line memories of the NR buffer 104 except for the line memory to which the video signals corresponding to one line have been input from the NR section 103 are input from the NR buffer 104 to the scaling section 105. Accordingly, noise components of video signals are reduced with the memory size reduced.
摘要翻译： 在对视频信号执行NR（降噪）和缩放的情况下，NR缓冲器104由例如五行存储器形成。 NR部分103和缩放部分105由控制部分108控制。 控制部分108控制NR部分103和缩放部分105，使得由NR部分103进行噪声降低并对应于一行的视频信号从NR部分103输出到NR的行存储器中的任意一个 缓冲器104和对应于多行并且存储在NR缓冲器104的行存储器中的视频信号，除了从NR部分103输入了与一条线对应的视频信号的行存储器之外，还从NR缓冲器 104到缩放部分105。 因此，随着存储器大小的减小，视频信号的噪声分量减小。
-
2.发明授权公开(公告)号：US08836758B2
公开(公告)日：2014-09-16
申请号：US13218957
申请日：2011-08-26
IPC分类号： H04N13/00 , H04N19/89 , H04N19/44 , H04N19/597 , H04N13/04
CPC分类号： H04N13/183 , H04N13/156 , H04N13/359 , H04N19/44 , H04N19/597 , H04N19/895
摘要： A 3D image processing apparatus includes: L and R graphic decoders which decode coded stream data to generate left-eye and right-eye image data; an image output control unit which outputs the generated image data; and a control unit which, when a decoding error occurs in generating one of the image data, and a successful decode occurs in generating the other of the image data, (i) shifts, by a preset offset, a pixel position of the other of the image data, to generate pseudo image data as the one of the image data, and (ii) outputs the pseudo image data to an image output control unit, wherein the image output control unit outputs the other of the image data and the pseudo image data, when the decoding error occurs in generating the one of the image data and the successful decode occurs in generating the other of the image data.
摘要翻译： 3D图像处理装置包括：L和R图形解码器，其解码编码的流数据以产生左眼和右眼图像数据; 图像输出控制单元，其输出所生成的图像数据; 以及控制单元，当在生成图像数据之一时发生解码错误，并且在生成另一个图像数据时发生成功解码，（i）以预设偏移量移位另一个的像素位置 所述图像数据生成作为所述图像数据之一的伪图像数据，以及（ii）将所述伪图像数据输出到图像输出控制单元，其中所述图像输出控制单元输出所述图像数据和所述伪图像中的另一个 数据，当在生成图像数据中的一个和成功解码时发生解码错误时，产生另一个图像数据。
-
公开(公告)号：US07551227B2
公开(公告)日：2009-06-23
申请号：US10940765
申请日：2004-09-15
申请人： Akifumi Yamana , Ryouji Yamaguchi
发明人： Akifumi Yamana , Ryouji Yamaguchi
IPC分类号： H04N9/475
CPC分类号： H04N5/4401 , H04N5/04 , H04N21/4305 , H04N21/4307
摘要： A signal processor includes a picture input section for receiving a video bit stream, a video decoding section for decoding the video bit stream, a picture display section for outputting decoded data from the video decoding section, a digital image input section for receiving digital image data, a digital image display section for outputting the digital image data, a blending section for generating a picture signal from the digital image display section and the picture display section, an audio input section for receiving the digital audio data and the audio bit stream, an audio decoding section for decoding audio data and the audio bit stream, an audio output section for adding an audio signal to data from the audio decoding section to generate a signal and outputting the generated signal, and a synchronizing section for synchronizing respective outputs of the blending section and the audio output section.
摘要翻译： 信号处理器包括用于接收视频比特流的图像输入部分，用于解码视频比特流的视频解码部分，用于从视频解码部分输出解码数据的图像显示部分，用于接收数字图像数据的数字图像输入部分 ，用于输出数字图像数据的数字图像显示部分，用于从数字图像显示部分和图像显示部分生成图像信号的混合部分，用于接收数字音频数据和音频比特流的音频输入部分， 用于对音频数据和音频比特流进行解码的音频解码部分，用于将音频信号添加到来自音频解码部分的数据以产生信号并输出生成的信号的音频输出部分，以及用于使混合的各个输出同步的同步部分 部分和音频输出部分。
-
公开(公告)号：US08811470B2
公开(公告)日：2014-08-19
申请号：US10599494
申请日：2005-04-01
申请人： Kozo Kimura , Tokuzo Kiyohara , Hiroshi Mizuno , Junji Michiyama , Tomohiko Kitamura , Ryoji Yamaguchi , Manabu Kuroda , Nobuhiko Yamada , Hideyuki Ohgose , Akifumi Yamana
发明人： Kozo Kimura , Tokuzo Kiyohara , Hiroshi Mizuno , Junji Michiyama , Tomohiko Kitamura , Ryoji Yamaguchi , Manabu Kuroda , Nobuhiko Yamada , Hideyuki Ohgose , Akifumi Yamana
IPC分类号： H04N7/12
CPC分类号： G06F13/4027 , H04N5/775 , H04N5/781 , H04N5/85 , H04N5/907 , H04N9/7921 , H04N9/8042
摘要： An integrated circuit for video/audio processing in which design resources obtained by development of video/audio devices can also be used for other types of video/audio devices. The integrated circuit includes a microcomputer that includes a CPU, a stream input/output for inputting/outputting a video and audio stream to and from an external device, a media processor that executes the media processing including at least one compressing and decompressing the video and audio stream inputted to the stream input/output, an AV input/output that converts the video and audio stream subjected to the media processing by the media processor into video and audio signals and outputting these signals to the external device. A memory interface controls a data transfer between the microcomputer, the stream input/output, the media processor and the AV input/output and an external memory.
摘要翻译： 用于视频/音频处理的集成电路，其中通过开发视频/音频设备获得的设计资源也可以用于其他类型的视频/音频设备。 集成电路包括微型计算机，其包括CPU，用于向外部设备输入/输出视频和音频流的流输入/输出，执行媒体处理的媒体处理器，该媒体处理包括至少一个压缩和解压缩视频，以及 输入到流输入/输出的音频流，将由媒体处理器进行媒体处理的视频和音频流转换成视频和音频信号并将这些信号输出到外部设备的AV输入/输出。 存储器接口控制微机，流输入/输出，媒体处理器和AV输入/输出之间的数据传输以及外部存储器。
-
公开(公告)号：US20050169532A1
公开(公告)日：2005-08-04
申请号：US10940765
申请日：2004-09-15
申请人： Akifumi Yamana , Ryouji Yamaguchi
发明人： Akifumi Yamana , Ryouji Yamaguchi
CPC分类号： H04N5/4401 , H04N5/04 , H04N21/4305 , H04N21/4307
摘要： A signal processor includes a picture input section for receiving a video bit stream, a video decoding section for decoding the video bit stream, a picture display section for outputting decoded data from the video decoding section, a digital image input section for receiving digital image data, a digital image display section for outputting the digital image data, a blending section for generating a picture signal from the digital image display section and the picture display section, an audio input section for receiving the digital audio data and the audio bit stream, an audio decoding section for decoding audio data and the audio bit stream, an audio output section for adding an audio signal to data from the audio decoding section to generate a signal and outputting the generated signal, and a synchronizing section for synchronizing respective outputs of the blending section and the audio output section.
摘要翻译： 信号处理器包括用于接收视频比特流的图像输入部分，用于解码视频比特流的视频解码部分，用于从视频解码部分输出解码数据的图像显示部分，用于接收数字图像数据的数字图像输入部分 ，用于输出数字图像数据的数字图像显示部分，用于从数字图像显示部分和图像显示部分生成图像信号的混合部分，用于接收数字音频数据和音频比特流的音频输入部分， 用于对音频数据和音频比特流进行解码的音频解码部分，用于将音频信号添加到来自音频解码部分的数据以产生信号并输出生成的信号的音频输出部分，以及用于使混合的各个输出同步的同步部分 部分和音频输出部分。
-
公开(公告)号：US20070286275A1
公开(公告)日：2007-12-13
申请号：US10599494
申请日：2005-04-01
申请人： Kozo Kimura , Tokuzo Kiyohara , Hiroshi Mizuno , Junji Michiyama , Tomohiko Kitamura , Ryoji Yamaguchi , Manabu Kuroda , Nobuhiko Yamada , Hideyuki Ohgose , Akifumi Yamana
发明人： Kozo Kimura , Tokuzo Kiyohara , Hiroshi Mizuno , Junji Michiyama , Tomohiko Kitamura , Ryoji Yamaguchi , Manabu Kuroda , Nobuhiko Yamada , Hideyuki Ohgose , Akifumi Yamana
CPC分类号： G06F13/4027 , H04N5/775 , H04N5/781 , H04N5/85 , H04N5/907 , H04N9/7921 , H04N9/8042
摘要： The present invention provides an integrated circuit for video/audio processing in which the design resources obtained by the development of video/audio devices can be used also for other types of video/audio devices. The integrated circuit comprises a microcomputer block 2 including a CPU, a stream I/O block 4 for inputting/outputting video and audio streams to and from an external device, a media processing block 3 for executing the media processing including at least one of the compression and decompression of the video and audio streams, etc. inputted to the stream I/O block 4, an AV IO block 5 for converting the video and audio streams subjected to the media processing in the media processing block 3 into video and audio signals and outputting these signals to the external device, etc, and a memory IF block 6 for controlling the data transfer between the microcomputer block 2, the stream I/C block 4, the media processing block 3 and the AV IO block 5 and an external memory 9.
摘要翻译： 本发明提供了一种用于视频/音频处理的集成电路，其中通过开发视频/音频设备获得的设计资源也可以用于其他类型的视频/音频设备。 该集成电路包括一个包括CPU的微处理器块2，用于向外部设备输入/输出视频和音频流的流I / O块4，用于执行媒体处理的媒体处理块3，包括至少一个 输入到流I / O块4的视频和音频流等的压缩和解压缩，用于将经过媒体处理块3中的媒体处理的视频和音频流转换成视频和音频信号的AV IO块5 并将这些信号输出到外部设备等;以及存储器IF块6，用于控制微计算机块2，流I / C块4，媒体处理块3和AV IO块5之间的数据传输，以及外部 记忆9。
-
公开(公告)号：US07042950B2
公开(公告)日：2006-05-09
申请号：US10292535
申请日：2002-11-13
申请人： Akifumi Yamana , Toshiaki Tsuji , Hideki Ishii
发明人： Akifumi Yamana , Toshiaki Tsuji , Hideki Ishii
IPC分类号： H04B1/66
CPC分类号： H04N5/44591 , H04N5/4401 , H04N21/4316 , H04N21/4347 , H04N21/440263
摘要： The multichannel video processing unit of the invention includes: a decoding section for sequentially selecting a bit stream from a plurality of bit streams each including encoded data of an image of one channel, decoding the selected bit stream by one frame each, and outputting decoded data; a vertical filtering section for sequentially selecting a channel from a plurality of channels corresponding to the decoded images, performing vertical processing for the decoded data corresponding to the selected channel, and outputting vertically-processed data; a horizontal filtering section for sequentially selecting a channel according to the position at which the image is to be displayed, performing horizontal processing for the vertically-processed data corresponding to the selected channel, and outputting horizontally-processed data; and an output processing section for generating a video signal for display of images of a plurality of channels by synthesizing the horizontally-processed data and outputting the generated signal.
-
-
-
-
-
-
搜索结果
7 条记录 (耗时 0.015 秒)
